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| TC58FVM7(T/B)2AFT(65/80) TOSHIBA MOS DIGITAL INTEGRATED CIRCUIT SILICON GATE CMOS 128-MBIT (16M x 8 BITS / 8M x 16 BITS) CMOS FLASH MEMORY DESCRIPTION The TC58FVM7T2A/B2A is a 134217728-bit, 3.0-V read-only electrically erasable and programmable flash memory organized as 16777216 words x 8 bits or as 8388608 words x 16 bits. The TC58FVM7T2A/B2A features commands for Read, Program and Erase operations to allow easy interfacing with microprocessors. The commands are based on the JEDEC standard. The Program and Erase operations are automatically executed in the chip. The TC58FVM7T2A/B2A also features a Simultaneous Read/Write operation so that data can be read during a Write or Erase operation. FEATURES * * * * * * Access Time (Random/Page) Power supply voltage VDD = 2.3 V~3.6 V TC58FVM7T2A/B2AFT65 TC58FVM7T2A/B2AFT80 Operating temperature VDD CL = 30 pF CL = 100 pF CL = 30 pF CL = 100 pF Ta = -40C~85C Organization 2.7~3.6V 65 ns/25 ns 70 ns/30 ns 80 ns/30 ns 85 ns/35 ns 16M x 8 bits/8M x 16 bits 2.3~3.6V 70 ns/30 ns 75 ns/35 ns 85 ns/35 ns 90 ns/40 ns Functions * Power consumption Simultaneous Read/Write 10 A (Standby) Page Read 15 mA (Program/Erase operation) Auto Program, Auto Page Program 55 mA (Random Read operation) Auto Block Erase, Auto Chip Erase 11 mA (Address Increment Read operation) Fast Program Mode / Acceleration Mode 5 mA (Page Read operation) Program Suspend/Resume * Package Erase Suspend/Resume TSOP 56-P-1420-0.50A (weight: 0.61g) data polling/Toggle bit block protection, boot block protection Automatic Sleep, support for hidden ROM area common flash memory interface (CFI) Byte/Word Modes Block erase architecture 8 x 8 Kbytes/255 x 64 Kbytes Boot block architecture TC58FVM7T2A: top boot block TC58FVM7B2A: bottom boot block Mode control Compatible with JEDEC standard commands Erase/Program cycles 105 cycles typ. * * * * 2002-10-24 1/68 TC58FVM7(T/B)2AFT(65/80) Ordering information TC58 FV M7 T2 A FT 65 Speed version 65 = 65 ns, 80 = 80 ns Package FT = TSOP Design rule A = 0.16 m Function/Boot block architecture/Bank ratio T2 = Page mode/Top boot block/1:3:3:1 B2 = Page mode/Bottom boot block/1:3:3:1 Capacity M7 = 128Mbits Supply Voltage V = 3V system Device type F = NOR Flash memory Toshiba CMOS E2PROM Ordering type TC58FVM7T2AFT65 TC58FVM7B2AFT65 TC58FVM7T2AFT80 TC58FVM7B2AFT80 Boot block Top Speed version Package 65ns Bottom TSOP Top 85ns Bottom -P-1420-0.50 2002-10-24 2/68 TC58FVM7(T/B)2AFT(65/80) PIN ASSIGNMENT (TOP VIEW) N.C A22 A15 A14 A13 A12 A11 A10 A9 A8 A19 A20 WE RESET A21 WP / ACC RY / BY A18 A17 A7 A6 A5 A4 A3 A2 A1 N.C N.C 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 56 55 54 53 52 51 50 49 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 PIN NAMES N.C N.C A16 BYTE VSS DQ15/A-1 DQ7 DQ14 DQ6 DQ13 DQ5 DQ12 DQ4 VDD DQ11 DQ3 DQ10 DQ2 DQ9 DQ1 DQ8 DQ0 OE VSS CE A0 N.C N.C A-1, A0~A22 DQ0~DQ15 CE OE Address Input Data Input/Output Chip Enable Input Output Enable Input Word/Byte Select Input Write Enable Input Ready/Busy Output Hardware Reset Input Write Protect / Program Acceleration Input Power Supply Ground BYTE WE RY/BY RESET WP/ACC VDD VSS 2002-10-24 3/68 TC58FVM7(T/B)2AFT(65/80) BLOCK DIAGRAM VDD VSS RY/BY DQ0 DQ15 RY/BY Buffer I/O Buffer WP/ACC WE BYTE RESET CE OE Control Circuit Data Latch Command Register A0 Address Buffer Address Latch A22 A-1 2002-10-24 4/68 TC58FVM7(T/B)2AFT(65/80) MODE SELECTION BYTE MODE WORD MODE MODE Read / Page Read ID Read (Manufacturer Code) ID Read (Device Code) Standby Output Disable Write Block Protect 1 Verify Block Protect Temporary Block Unprotect Hardware Reset / Standby Boot Block Protect CE OE WE H H H * H (2) (2) A9 A9 VID VID * * A9 VID VID * * * A6 A6 L L * * A6 L L * * * A1 A1 L L * * A1 H H * * * A0 A0 L H * * A0 L L * * * RESET WP/ACC DQ0~DQ7 DOUT Code Code High-Z High-Z DIN * Code * High-Z * (1) DQ0~DQ15 DOUT Code Code High-Z High-Z DIN * Code * High-Z * L L L H * L L L * * * L L L * H H VID L * * * H H H H * H H H VID L * * * * * * * * * * * L H * * * Notes: * = VIH or VIL, L = VIL, H = VIH (1) DQ8~DQ14 are High-Z and DQ15/A-1 is Address Input in Byte Mode. Addresses are A22~A0 in Word Mode ( BYTE = VIH), A22~A-1 in Byte Mode ( BYTE = VIL). (2) Pulse input ID CODE TABLE CODE TYPE Manufacturer Code TC58FVM7T2A Device Code TC58FVM7B2A Verify Block Protect * BA (2) A22~A12 * * A6 L L L L A1 L L L H A0 L H H L CODE (HEX) 0098h 007Ch 0082h Data (3) (1) Notes: * = VIH or VIL, L = VIL, H = VIH (1) DQ8~DQ14 are High-Z and DQ15/A-1 is Address Input in Byte Mode. (2) BA: Block Address (3) 0001h - Protected Block 0000h - Unprotected Block 2002-10-24 5/68 TC58FVM7(T/B)2AFT(65/80) COMMAND SEQUENCES BUS COMMAND SEQUENCE WRITE CYCLES REQ'D Read/Reset Word Read/Reset Byte Word ID Read Byte Word Auto-Program Byte Auto PageProgram Word Byte 11 19 1 1 6 Erase Auto Block Erase Byte Word 6 Byte 1 1 4 Word Verify Block Protect Byte Fast Program Set Fast Program Fast Program Reset Hidden ROM Mode Entry Hidden ROM Program Hidden ROM Erase Hidden ROM Mode Exit Query Command Word 3 Byte Word 4 Byte Word 6 Byte Word 4 Byte Word 2 Byte BK BK AAAh (3) (3) FIRST BUS WRITE CYCLE Addr. XXXh 555h Data F0h SECOND BUS WRITE CYCLE Addr. Data THIRD BUS WRITE CYCLE Addr. Data FOURTH BUS WRITE CYCLE Addr. Data FIFTH BUS WRITE CYCLE Addr. Data SIXTH BUS WRITE CYCLE Addr. Data 1 3 2AAh AAh 55h 555h 2AAh AAh 55h 555h 2AAh AAh 55h 555h 2AAh AAh 55h 555h B0h 30h 2AAh AAh 55h 555h 2AAh AAh 55h 555h B0h 30h 60h BPA (9) 555h F0h AAAh BK (3) RA (1) RD (2) AAAh 555h 3 AAAh 555h 4 AAAh 555h AAAh BK BK (3) (3) + + 90h IA (4) 555h BK (3) ID (5) AAAh 555h A0h AAAh 555h E6h AAAh PA (6) PA (6) PD (7) PD (7) PA (6) PD (7) PA (6) PD (7) Program Suspend Program Resume Auto Chip Word 555h AAAh 555h AAAh BK BK (3) (3) 555h 80h AAAh 555h 80h AAAh 555h AAh AAAh 555h AAh AAAh 2AAh 55h 555h 2AAh 55h 555h 555h 10h AAAh BA (8) 30h Block Erase Suspend Block Erase Resume Block Protect 2 XXXh 555h 60h XXXh BK (3) 40h BPA (9) BPD (10) 2AAh AAh 55h 555h 2AAh AAh 55h 555h A0h 90h AAh PA (6) (7) + + 90h BPA (9) 555h BK (3) 3 AAAh 555h 3 Byte 2 2 AAAh XXXh XXXh 555h AAAh 555h BPD (10) AAAh 555h 20h AAAh PD F0h (13) Word XXXh 2AAh 555h 55h 88h AAAh 555h 55h A0h AAAh 555h 55h 80h AAAh 555h 55h 90h AAAh CD (12) (6) (7) 555h 2AAh AAh 555h 2AAh AAh 555h 2AAh AAh 555h 98h CA (11) PA PD AAAh 555h AAAh 555h 555h AAh AAAh XXXh 00h 2AAh 55h 555h BA (8) 30h + 55h +AAh Notes: The system should generate the following address patterns: Word Mode: 555h or 2AAh on address pins A10~A0 DQ8~DQ15 are ignored in Word Mode. (1) (2) (3) (4) Byte Mode: AAAh or 555h on address pins A10~A-1 (7) PD: Program Data RA: Read Address (8) BA: Block Address = A22~A12 RD: Read Data (9) BPA: Block Address and ID Read Address (A6, A1, A0) Block Address = A22~A12 BK: Bank Address = A22~A20 ID Read Address = (0, 1, 0) IA : Bank Address and ID Read Address (A6, A1, A0) (10) BPD: Verify Data Bank Address = A22~A20 (11) CA: CFI Address Manufacturer Code = (0, 0, 0) (12) CD: CFI Data Device Code = (0, 0, 1) (13) F0h: 00h is valid too ID : ID Data PA: Program Address ( Input continuous 8 address from (A0,A1,A2)=(0,0,0) to (A0,A1,A2)=(1,1,1) in Page program.) (5) (6) 2002-10-24 6/68 TC58FVM7(T/B)2AFT(65/80) SIMULTANEOUS READ/WRITE OPERATION The TC58FVM7T2A/B2A features a Simultaneous Read/Write operation. The Simultaneous Read/Write operation enables the device to simultaneously write data to or erase data from a bank while reading data from another bank. The TC58FVM7T2A/B2A has a total of four banks (16Mbits : 48Mbits : 48Mbits : 16Mbits ). Banks can be switched between using the bank addresses (A22~A20). For a description of bank blocks and addresses, please refer to the Block Address Table and Block Size Table. The Simultaneous Read/Write operation cannot perform multiple operations within a single bank. The table below shows the operation modes in which simultaneous operation can be performed. Note that during Auto-Program execution or Auto Block Erase operation, the Simultaneous Read/Write operation cannot read data from addresses in the same bank which have not been selected for operation. Data from these addresses can be read using the Program Suspend or Erase Suspend function, however. SIMULTANEOUS READ/WRITE OPERATION STATUS OF BANK ON WHICH OPERATION IS BEING PERFORMED Read Mode ID Read Mode (1) STATUS OF OTHER BANKS Auto-Program Mode Auto-Page Program Mode Fast Program Mode (2) Program Suspend Mode Read Mode Auto Block Erase Mode Auto Multiple Block Erase Mode Erase Suspend Mode Program during Erase Suspend Program Suspend during Erase Suspend CFI Mode (1) Only Command Mode is valid. (2) Including times when Acceleration Mode is in use. (3) If the selected blocks are spread across all nine banks, simultaneous operation cannot be carried out. (3) OPERATION MODES In addition to the Read, Write and Erase Modes, the TC58FVM7T2A/B2A features many functions including block protection and data polling. When incorporating the device into a deign, please refer to the timing charts and flowcharts in combination with the description below. READ MODE ( PAGE READ ) To read data from the memory cell array, set the device to Read Mode. In Read Mode the device can perform high-speed random access and Page Read as asynchronous ROM. The device is automatically set to Read Mode immediately after power-on or on completion of automatic operation. A software reset releases ID Read Mode and the lock state which the device enters if automatic operation ends abnormally, and sets the device to Read Mode. A hardware reset terminates operation of the device and resets it to Read Mode. When reading data without changing the address immediately after power-on, either input a hardware Reset or change CE from H to L. 2002-10-24 7/68 TC58FVM7(T/B)2AFT(65/80) ID Read Mode ID Read Mode is used to read the device maker code and device code. The mode is useful in that it allows EPROM programmers to identify the device type automatically. ID read can be executed in two ways, as follows: (1) Applying VID to A9 This method is used mainly by EPROM programmers. Applying VID to A9 sets the device to ID Read Mode, outputting the maker code from address 00H and the device code from address 01H. Releasing VID from A9 returns the device to Read Mode. With this method all banks are set to ID Read Mode; thus, simultaneous operation cannot be performed. (2) Input command sequence With this method simultaneous operation can be performed. Inputting an ID Read command sets the specified bank to ID Read Mode. Banks are specified by inputting the bank address (BK) in the third Bus Write cycle of the Command cycle. To read an ID code, the bank address as well as the ID read address must be specified. The maker code is output from address BK + 00; the device code is output from address BK + 01. From other banks data are output from the memory cells. Inputting a Reset command releases ID Read Mode and returns the device to Read Mode. Access time in ID Read Mode is the same as that in Read Mode. For a list of the codes, please refer to the ID Code Table. Standby Mode There are two ways to put the device into Standby Mode. (1) Control using CE and RESET With the device in Read Mode, input VDD 0.3 V to CE and RESET . The device will enter Standby Mode and the current will be reduced to the standby current (IDDS1). However, if the device is in the process of performing simultaneous operation, the device will not enter Standby Mode but will instead cause the operating current to flow. (2) Control using RESET only With the device in Read Mode, input VSS 0.3 V to RESET . The device will enter Standby Mode and the current will be reduced to the standby current (IDDS1). Even if the device is in the process of performing simultaneous operation, this method will terminate the current operation and set the device to Standby Mode. This is a hardware reset and is described later. In Standby Mode DQ is put in High-Impedance state. Auto-Sleep Mode This function suppresses power dissipation during reading. If the address input does not change for 150 ns, the device will automatically enter Sleep Mode and the current will be reduced to the standby current (IDDS2). However, if the device is in the process of performing simultaneous operation, the device will not enter Standby Mode but will instead cause the operating current to flow. Because the output data is latched, data is output in Sleep Mode. When the address is changed, Sleep Mode is automatically released, and data from the new address is output. Output Disable Mode Inputting VIH to OE disables output from the device and sets DQ to High-Impedance. 2002-10-24 8/68 TC58FVM7(T/B)2AFT(65/80) Command Write The TC58FVM7T2A/B2A uses the standard JEDEC control commands for a single-power supply E2PROM. A Command Write is executed by inputting the address and data into the Command Register. The command is written by inputting a pulse to WE with CE = VIL and OE = VIH ( WE control). The command can also be written by inputting a pulse to CE with WE = VIL ( CE control). The address is latched on the falling edge of either WE or CE . The data is latched on the rising edge of either WE or CE . DQ0~DQ7 are valid for data input and DQ8~DQ15 are ignored. To abort input of the command sequence use the Reset command. The device will reset the Command Register and enter Read Mode. If an undefined command is input, the Command Register will be reset and the device will enter Read Mode. Software Reset Apply a software reset by inputting a Read/Reset command. A software reset returns the device from ID Read Mode or CFI Mode to Read Mode, releases the lock state if automatic operation has ended abnormally, and clears the Command Register. Hardware Reset A hardware reset initializes the device and sets it to Read Mode. When a pulse is input to RESET for tRP, the device abandons the operation which is in progress and enters Read Mode after tREADY. Note that if a hardware reset is applied during data overwriting, such as a Write or Erase operation, data at the address or block being written to at the time of the reset will become undefined. After a hardware reset the device enters Read Mode if RESET = VIH or Standby Mode if RESET = VIL. The DQ pins are High-Impedance when RESET = VIL. After the device has entered Read Mode, Read operations and input of any command are allowed. Comparison between Software Reset and Hardware Reset ACTION Releases ID Read Mode or CFI Mode. Clears the Command Register. Releases the lock state if automatic operation has ended abnormally. Stops any automatic operation which is in progress. Stops any operation other than the above and returns the device to Read Mode. SOFTWARE RESET True True True False False HARDWARE RESET True True True True True BYTE/Word Mode BYTE is used select Word Mode (16 bits) or Byte Mode (8 bits) for the TC58FVM7T2A/B2A. If VIH is input to BYTE , the device will operate in Word Mode. Read data or write commands using DQ0~DQ15. When VIL is input to BYTE , read data or write commands using DQ0~DQ7. DQ15/A-1 is used as the lowest address. DQ8~DQ14 will become High-Impedance. 2002-10-24 9/68 TC58FVM7(T/B)2AFT(65/80) Auto-Program Mode The TC58FVM7T2A/B2A can be programmed in either byte or word units. Auto-Program Mode is set using the Program command. The program address is latched on the falling edge of the WE signal and data is latched on the rising edge of the fourth Bus Write cycle (with WE control). Auto programming starts on the rising edge of the WE signal in the fourth Bus Write cycle. The Program and Program Verify commands are automatically executed by the chip. The device status during programming is indicated by the Hardware Sequence flag. To read the Hardware Sequence flag, specify the address to which the Write is being performed. During Auto Program execution, a command sequence for the bank on which execution is being performed cannot be accepted. To terminate execution, use a hardware reset. Note that if the Auto-Program operation is terminated in this manner, the data written so far is invalid. Any attempt to program a protected block is ignored. In this case the device enters Read Mode 3 s after the rising edge of the WE signal in the fourth Bus Write cycle. If an Auto-Program operation fails, the device remains in the programming state and does not automatically return to Read Mode. The device status is indicated by the Hardware Sequence flag. Either a Reset command or a hardware reset is required to return the device to Read Mode after a failure. If a programming operation fails, the block which contains the address to which data could not be programmed should not be used. The device allows 0s to be programmed into memory cells which contain a 1. 1s cannot be programmed into cells which contain 0s. If this is attempted, execution of Auto Program will fail. This is a user error, not a device error. A cell containing 0 must be erased in order to set it to 1. Auto-Page Program Mode Auto-Page Program is a function which enables to simultaneously program 8words or 16bytes data. In this mode Program time for 128M bit is less than 60% compare with Auto program mode. In word mode, input page program command during first bus write cycle to third bus write cycle. Input program data and address of (A0,A1,A2)=(0,0,0) in forth bus write cycle. Input increment address and program data during fifth bus write cycle to eleventh bus write cycle. After input eleventh bus write cycle , page program operation start. In byte mode, input increment address and program data of (A-1,A0,A1,A2)=(0,0,0,0)--- (A-1,A0,A1,A2)=(1,1,1,1) during fifth bus write cycle to nineteenth bus write cycle. Fast Program Mode Fast Program is a function which enables execution of the command sequence for the Auto Program to be completed in two cycles. In this mode the first two cycles of the command sequence, which normally requires four cycles, are omitted. Writing is performed in the remaining two cycles. To execute Fast Program, input the Fast Program command. Write in this mode uses the Fast Program command but operation is the same at that for ordinary Auto-Program. The status of the device is indicated by the Hardware Sequence flag and read operations can be performed as usual. To exit this mode, the Fast Program Reset command must be input. When the command is input, the device will return to Read Mode. Acceleration Mode The TC58FVM7T2A/B2A features Acceleration Mode which allows write time to be reduced. Applying VACC to WP or ACC automatically sets the device to Acceleration Mode. In Acceleration Mode, Block Protect Mode changes to Temporary Block Unprotect Mode. Write Mode changes to Fast Program Mode. Modes are switched by the WP/ACC signal; thus, there is no need for a Temporary Block Unprotect operation or to set or reset Fast Program Mode. Operation of Write is the same as in Auto-Program Mode. Removing VACC from WP/ACC terminates Acceleration Mode. 2002-10-24 10/68 TC58FVM7(T/B)2AFT(65/80) Program Suspend/Resume Mode Program Suspend is used to enable Data Read by suspending the Write operation. The device accepts a Program Suspend command in Write Mode (including Write operations performed during Erase Suspend) but ignores the command in other modes. When the command is input, the address of the bank on which Write is being performed must be specified. After input of the command, the device will enter Program Suspend Read Mode after tSUSP. During Program Suspend, Cell Data Read, ID Read and CFI Data Read can be performed. When Data Write is suspended, the address to which Write was being performed becomes undefined. ID Read and CFI Data Read are the same as usual. After completion of Program Suspend input a Program Resume command to return to Write Mode. When inputting the command, specify the address of the bank on which Write is being performed. If the ID Read or CFI Data Read functions is being used, abort the function before inputting the Resume command. On receiving the Resume command, the device returns to Write Mode and resumes outputting the Hardware Sequence flag for the bank to which data is being written. Program Suspend can be run in Fast Program Mode or Acceleration Mode. However, note that when running Program Suspend in Acceleration Mode, VACC must not be released. Auto Chip Erase Mode The Auto Chip Erase Mode is set using the Chip Erase command. An Auto Chip Erase operation starts on the rising edge of WE in the sixth bus cycle. All memory cells are automatically preprogrammed to 0, erased and verified as erased by the chip. The device status is indicated by the Hardware Sequence flag. Command input is ignored during an Auto Chip Erase. A hardware reset can interrupt an Auto Chip Erase operation. If an Auto Chip Erase operation is interrupted, it cannot be completed correctly. Hence an additional Erase operation must be performed. Any attempt to erase a protected block is ignored. If all blocks are protected, the Auto Erase operation will not be executed and the device will enter Read mode 400 s after the rising edge of the WE signal in the sixth bus cycle. If an Auto Chip Erase operation fails, the device will remain in the erasing state and will not return to Read Mode. The device status is indicated by the Hardware Sequence flag. Either a Reset command or a hardware reset is required to return the device to Read Mode after a failure. In this case it cannot be ascertained which block the failure occurred in. Either abandon use of the device altogether, or perform a Block Erase on each block, identify the failed block, and stop using it. The host processor must take measures to prevent subsequent use of the failed block. 2002-10-24 11/68 TC58FVM7(T/B)2AFT(65/80) Auto Block Erase / Auto Multi-Block Erase Modes The Auto Block Erase Mode and Auto Multi-Block Erase Mode are set using the Block Erase command. The block address is latched on the falling edge of the WE signal in the sixth bus cycle. The block erase starts as soon as the Erase Hold Time (tBEH) has elapsed after the rising edge of the WE signal. When multiple blocks are erased, the sixth Bus Write cycle is repeated with each block address and Auto Block Erase command being input within the Erase Hold Time (this constitutes an Auto Multi-Block Erase operation). If a command other than an Auto Block Erase command or Erase Suspend command is input during the Erase Hold Time, the device will reset the Command Register and enter Read Mode. The Erase Hold Time restarts on each successive rising edge of WE . Once operation starts, all memory cells in the selected block are automatically preprogrammed to 0, erased and verified as erased by the chip. The device status is indicated by the setting of the Hardware Sequence flag. When the Hardware Sequence flag is read, the addresses of the blocks on which auto-erase operation is being performed must be specified. If the selected blocks are spread across all nine banks, simultaneous operation cannot be carried out. All commands (except Erase Suspend) are ignored during an Auto Block Erase or Auto Multi-Block Erase operation. Either operation can be aborted using a Hardware Reset. If an auto-erase operation is interrupted, it cannot be completed correctly; therefore, a further erase operation is necessary to complete the erasing. Any attempt to erase a protected block is ignored. If all the selected blocks are protected, the auto-erase operation is not executed and the device returns to Read Mode 400 s after the rising edge of the WE signal in the last bus cycle. If an auto-erase operation fails, the device remains in Erasing state and does not return to Read Mode. The device status is indicated by the Hardware Sequence flag. After a failure either a Reset command or a Hardware Reset is required to return the device to Read Mode. If multiple blocks are selected, it will not be possible to ascertain the block in which the failure occurred. In this case either abandon use of the device altogether, or perform a Block Erase on each block, identify the failed block, and stop using it. The host processor must take measures to prevent subsequent use of the failed block. Erase Suspend / Erase Resume Modes Erase Suspend Mode suspends Auto Block Erase and reads data from or writes data to an unselected block. The Erase Suspend command is allowed during an auto block erase operation but is ignored in all other oreration modes. When the command is input, the address of the bank on which Erase is being performed must be specified. In Erase Suspend Mode only a Read, Program or Resume command can be accepted. If an Erase Suspend command is input during an Auto Block Erase, the device will enter Erase Suspend Read Mode after tSUSE. The device status (Erase Suspend Read Mode) can be verified by checking the Hardware Sequence flag. If data is read consecutively from the block selected for Auto Block Erase, the DQ2 output will toggle and the DQ6 output will stop toggling and RY/ BY will be set to High-Impedance. Inputting a Write command during an Erase Suspend enables a Write to be performed to a block which has not been selected for the Auto Block Erase. Data is written in the usual manner. To resume the Auto Block Erase, input an Erase Resume command. On input of the command, the address of the bank on which the Write was being performed must be specified. On receiving an Erase Resume command, the device returns to the state it was in when the Erase Suspend command was input. If an Erase Suspend command is input during the Erase Hold Time, the device will return to the state it was in at the start of the Erase Hold Time. At this time more blocks can be specified for erasing. If an Erase Resume command is input during an Auto Block Erase, Erase resumes. At this time toggle output of DQ6 resumes and 0 is output on RY/ BY . 2002-10-24 12/68 TC58FVM7(T/B)2AFT(65/80) BLOCK PROTECTION Block Protection is a function for disabling writing and erasing specific blocks. Block protection can be carried out in two ways: by supplying a high voltage (VID) to the device (see Block protection 1) or by supplying a high voltage and a command sequence (see Block protection 2). (1) Block protection 1 Specify a device block address and make the following signal settings A9 = OE = VID, A1 = VIH and CE = A0 = A6 = VIL. Now when a pulse is input to WE for tPPLH, the device will start to write to the block protection circuit. Block protection can be verified using the Verify Block Protect command. Inputting VIL on OE sets the device to Verify Mode. 01H is output if the block is protected and 00H is output if the block is unprotected. If block protection was unsuccessful, the operation must be repeated. Releasing VID from A9 and OE terminates this mode. (2) Block protection 2 Applying VID to RESET and inputting the Block Protect 2 command also performs block protection. The first cycle of the command sequence is the Set-up command. In the second cycle, the Block Protect command is input, in which a block address and A1 = VIH and A0 = A6 = VIL are input. Now the device writes to the block protection circuit. There is a wait of tPPLH until this write is completed; however, no intervention is necessary during this time. In the third cycle the Verify Block Protect command is input. This command verifies the write to the block protection circuit. Read is performed in the fourth cycle. If the protection operation is complete, 01H is output. If a value other than 01H is output, block protection is not complete and the Block Protect command must be input again. Removing the VID input from RESET exits this mode. Temporary Block Unprotection The TC58FVM7T2A/B2A has a temporary block unprotection feature which disables block protection for all protected blocks. Unprotection is enabled by applying VID to the RESET pin. Now Write and Erase operations can be performed on all blocks except the boot blocks which have been protected by the Boot Block Protect operation. The device returns to its previous state when VID is removed from the RESET pin. That is, previously protected blocks will be protected again. Verify Block Protect The Verify Block Protect command is used to ascertain whether a block is protected or unprotected. Verification is performed either by inputting the Verify Block Protect command or by applying VID to the A9 pin, as for ID Read Mode, and setting the block address = A0 = A6 = VIL and A1 = VIH. If the block is protected, 01H is output. If the block is unprotected, 00H is output. Boot Block Protection Boot block protection temporarily protects certain boot blocks using a method different from ordinary block protection. Neither VID nor a command sequence is required. Protection is performed simply by inputting VIL on WP/ACC . The target blocks are the two pairs of boot blocks. The top boot blocks are BA261 and BA262; the bottom boot blocks are BA0 and BA1. Inputting VIH on WP/ACC releases the mode. From now on, if it is necessary to protect these blocks, the ordinary Block Protection Mode must be used. 2002-10-24 13/68 TC58FVM7(T/B)2AFT(65/80) Hidden ROM Area The TC58FVM7T2A/B2A features a 64-Kbyte hidden ROM area which is separate from the memory cells. The area consists of one block. Data Read, Write and Protect can be performed on this block. Because Protect cannot be released, once the block is protected, data in the block cannot be overwritten. The hidden ROM area is located in the address space indicated in the HIDDEN ROM AREA ADDRESS TABLE. To access the Hidden ROM area, input a Hidden ROM Mode Entry command. The device now enters Hidden ROM Mode, allowing Read, Write, Erase and Block Protect to be executed. Write and Erase operations are the same as auto operations except that the device is in Hidden ROM Mode. However, regarding write operation, Accelaration mode can not be performed during Hidden ROM Mode. To protect the hidden ROM area, use the block protection function. The operation of Block Protect here is the same as a normal Block Protect except that VIH rather than VID is input to RESET . Once the block has been protected, protection cannot be released, even using the temporary block unprotection function. Use Block Protect carefully. Note that in Hidden ROM Mode, simultaneous operation cannot be performed for BANK3 in top boot type and for BANK0 in bottom boot type. To exit Hidden ROM Mode, use the Hidden ROM Mode Exit command. This will return the device to Read Mode. HIDDEN ROM AREA ADDRESS TABLE TYPE BOOT BLOCK ARCHITECTURE TOP BOOT BLOCK BOTTOM BOOT BLOCK BYTE MODE ADDRESS RANGE FF0000H~FFFFFFH 000000H~00FFFFH SIZE 64 Kbytes 64 Kbytes WORD MODE ADDRESS RANGE 7F8000H~7FFFFFH 000000H~007FFFH SIZE 32 Kwords 32 Kwords TC58FVM7T2A TC58FVM7B2A 2002-10-24 14/68 TC58FVM7(T/B)2AFT(65/80) COMMON FLASH MEMORY INTERFACE (CFI) The TC58FVM7T2A/B2A conforms to the CFI specifications. To read information from the device, input the Query command followed by the address. In Word Mode DQ8~DQ15 all output 0s. To exit this mode, input the Reset command. CFI CODE TABLE ADDRESS A6~A0 10h 11h 12h 13h 14h 15h 16h 17h 18h 19h 1Ah DATA DQ15~DQ0 0051h 0052h 0059h 0002h 0000h 0040h 0000h 0000h 0000h 0000h 0000h DESCRIPTION ASCII string "QRY" Primary OEM command set 2: AMD/FJ standard type Address for primary extended table Alternate OEM command set 0: none exists Address for alternate OEM extended table VDD (min) (Write/Erase) DQ7~DQ4: 1 V DQ3~DQ0: 100 mV VDD (max) (Write/Erase) DQ7~DQ4: 1 V DQ3~DQ0: 100 mV VPP (min) voltage VPP (max) voltage Typical time-out per single byte/word write (2 s) Typical time-out for minimum size buffer write (2 s) Typical time-out per individual block erase (2 ms) Typical time-out for full chip erase (2 ms) Maximum time-out for byte/word write (2 times typical) Maximum time-out for buffer write (2 times typical) Maximum time-out per individual block erase (2 times typical) Maximum time-out for full chip erase (2 times typical) Device Size (2 byte) Flash device interface description 2: x8/x16 Maximum number of bytes in multi-byte write (2 ) N N N N N N N N N N 1Bh 0023h 1Ch 0036h 1Dh 1Eh 1Fh 20h 21h 22h 23h 24h 25h 26h 27h 28h 29h 2Ah 2Bh 0000h 0000h 0004h 0000h 000Ah 0000h 0005h 0000h 0004h 0000h 0018h 0002h 0000h 0004h 0000h 2002-10-24 15/68 TC58FVM7(T/B)2AFT(65/80) ADDRESS A6~A0 2Ch 2Dh 2Eh 2Fh 30h 31h 32h 33h 34h 40h 41h 42h 43h 44h DATA DQ15~DQ0 0002h 0007h 0000h 0020h 0000h 00FEh 0000h 0000h 0001h 0050h 0052h 0049h 0031h 0031h DESCRIPTION Number of erase block regions within device Erase Block Region 1 information Bits 0~15: y = block number Bits 16~31: z = block size (z x 256 bytes) Erase Block Region 2 information ASCII string "PRI" Major version number, ASCII Minor version number, ASCII Address-Sensitive Unlock 0: Required 1: Not required Erase Suspend 0: Not supported 1: For Read-only 2: For Read & Write Block Protect 0: Not supported X: Number of blocks per group Block Temporary Unprotect 0: Not supported 1: Supported Block Protect/Unprotect scheme Simultaneous operation 0: Not supported 1: Supported Burst Mode 0: Not supported Page Mode 0: Not supported VACC (min) voltage DQ7~DQ4: 1 V DQ3~DQ0: 100 mV VACC (max) voltage DQ7~DQ4: 1 V DQ3~DQ0: 100 mV Top/Bottom Boot Block Flag 2: TC58FVM7B2A 3: TC58FVM7T2A Program Suspend 0: Not supported 1: Supported 45h 0000h 46h 0002h 47h 0001h 48h 0001h 49h 0004h 4Ah 0001h 4Bh 0000h 4Ch 0001h 4Dh 0085h 4Eh 0095h 4Fh 000Xh 50h 0001h 2002-10-24 16/68 TC58FVM7(T/B)2AFT(65/80) ADDRESS A6~A0 DATA DQ15~DQ0 Bank Organization 00h : Data at 4Ah is zero X: Number of Banks Bank0 Region information X = Number of blocs Bank0 Bank1 Region information X = Number of blocks in Bank1 Bank2 Region information X = Number of blocks in Bank2 Bank3 Region information X = Number of blocks in Bank3 DESCRIPTION 57h 0004h 58h 00XXh TOP:20h BOTTOM:27h 59h 00XXh TOP:60h BOTTOM:60h 5Ah 00XXh TOP:60h BOTTOM:60h 5Bh 00XXh TOP:27h BOTTOM:20h 2002-10-24 17/68 TC58FVM7(T/B)2AFT(65/80) HARDWARE SEQUENCE FLAGS The TC58FVM7T2A/B2A has a Hardware Sequence flag which allows the device status to be determined during an auto mode operation. The output data is read out using the same timing as that used when CE = OE = VIL in Read Mode. The RY/ BY output can be either High or Low. The device re-enters Read Mode automatically after an auto mode operation has been completed successfully. The Hardware Sequence flag is read to determine the device status and the result of the operation is verified by comparing the read-out data with the original data. STATUS Auto Programming / Auto Page Programming Read in Program Suspend (1) DQ7 DQ 7 (4) DQ6 Toggle Data Toggle Toggle Toggle Toggle 1 Data Toggle Toggle Toggle Toggle Toggle DQ5 0 Data 0 0 0 0 0 Data 0 0 1 1 1 DQ3 0 Data 0 0 1 1 0 Data 0 0 0 1 0 DQ2 1 Data Toggle 1 Toggle 1 Toggle Data Toggle 1 1 NA NA RY/BY 0 High-Z 0 0 0 0 High-Z High-Z 0 0 0 0 0 Data Selected (2) (3) 0 0 0 0 1 Data DQ 7 Erase Hold Time In Auto Erase In Progress Auto Erase Selected Not-selected Not-selected Selected Read In Erase Suspend Programming Not-selected Auto Programming / Auto Page Programming Time Limit Exceeded Auto Erase Programming in Erase Suspend Not-selected Selected (4) DQ 7 DQ 7 0 DQ 7 Notes:DQ outputs cell data and RY/BY goes High-Impedence when the operation has been completed. DQ0 and DQ1 pins are reserved for future use. 0 is output on DQ0, DQ1 and DQ4. (1) Data output from an address to which Write is being performed is undefined. (2) Output when the block address selected for Auto Block Erase is specified and data is read from there. During Auto Chip Erase, all blocks are selected. (3) Output when a block address not selected for Auto Block Erase of same bank as selected block is specified and data is read from there. (4) In case of Page program operation is program data of (A0,A1,A2)=(1,1,1) in eleventh bus write cycle in word mode. Program data of (A-1,A0,A1,A2)=(1,1,1,1) in nineteenth bus write cycle in byte mode. DQ7 ( DATA polling) During an Auto-Program or auto-erase operation, the device status can be determined using the data polling function. DATA polling begins on the rising edge of WE in the last bus cycle. In an Auto-Program operation, DQ7 outputs inverted data during the programming operation and outputs actual data after programming has finished. In an auto-erase operation, DQ7 outputs 0 during the Erase operation and outputs 1 when the Erase operation has finished. If an Auto-Program or auto-erase operation fails, DQ7 simply outputs the data. When the operation has finished, the address latch is reset. Data polling is asynchronous with the OE signal. 2002-10-24 18/68 TC58FVM7(T/B)2AFT(65/80) DQ6 (Toggle bit 1) The device status can be determined by the Toggle Bit function during an Auto-Program or auto-erase operation. The Toggle bit begins toggling on the rising edge of WE in the last bus cycle. DQ6 alternately outputs a 0 or a 1 for each OE access while CE = VIL while the device is busy. When the internal operation has been completed, toggling stops and valid memory cell data can be read by subsequent reading. If the operation fails, the DQ6 output toggles. If an attempt is made to execute an Auto Program operation on a protected block, DQ6 will toggle for around 3 s. It will then stop toggling. If an attempt is made to execute an auto erase operation on a protected block, DQ6 will toggle for around 400 s. It will then stop toggling. After toggling has stopped the device will return to Read Mode. DQ5 (internal time-out) If the internal timer times out during a Program or Erase operation, DQ5 outputs a 1. This indicates that the operation has not been completed within the allotted time. Any attempt to program a 1 into a cell containing a 0 will fail (see Auto-Program Mode). In this case DQ5 outputs a 1. Either a hardware reset or a software Reset command is required to return the device to Read Mode. DQ3 (Block Erase timer) The Block Erase operation starts 50 s (the Erase Hold Time) after the rising edge of WE in the last command cycle. DQ3 outputs a 0 for the duration of the Block Erase Hold Time and a 1 when the Block Erase operation starts. Additional Block Erase commands can only be accepted during the Block Erase Hold Time. Each Block Erase command input within the hold time resets the timer, allowing additional blocks to be marked for erasing. DQ3 outputs a 1 if the Program or Erase operation fails. DQ2 (Toggle bit 2) DQ2 is used to indicate which blocks have been selected for Auto Block Erase or to indicate whether the device is in Erase Suspend Mode. If data is read continuously from the selected block during an Auto Block Erase, the DQ2 output will toggle. Now 1 will be output from non-selected blocks; thus, the selected block can be ascertained. If data is read continuously from the block selected for Auto Block Erase while the device is in Erase Suspend Mode, the DQ2 output will toggle. Because the DQ6 output is not toggling, it can be determined that the device is in Erase Suspend Mode. If data is read from the address to which data is being written during Erase Suspend in Programming Mode, DQ2 will output a 1. RY/BY (READY/ BUSY ) TC58FVM7T2A/B2A has a RY/ BY signal to indicate the device status to the host processor. A 0 (Busy state) indicates that an Auto-Program or auto-erase operation is in progress. A 1 (Ready state) indicates that the operation has finished and that the device can now accept a new command. RY/ BY outputs a 0 when an operation has failed. RY/ BY outputs a 0 after the rising edge of WE in the last command cycle. During an Auto Block Erase operation, commands other than Erase Suspend are ignored. RY/ BY outputs a 1 during an Erase Suspend operation. The output buffer for the RY/ BY pin is an open-drain type circuit, allowing a wired-OR connection. A pull-up resistor must be inserted between VDD and the RY/ BY pin. 2002-10-24 19/68 TC58FVM7(T/B)2AFT(65/80) DATA PROTECTION The TC58FVM7T2A/B2A includes a function which guards against malfunction or data corruption. Protection against Program/Erase Caused by Low Supply Voltage To prevent malfunction at power-on or power-down, the device will not accept commands while VDD is below VLKO. In this state, command input is ignored. If VDD drops below VLKO during an Auto Operation, the device will terminate Auto-Program execution. In this case, Auto operation is not executed again when VDD return to recommended VDD voltage Therefore, command need to be input to execute Auto operation again. When VDD > VLKO, make up countermeasure to be input accurately command in system side please. Protection against Malfunction Caused by Glitches To prevent malfunction during operation caused by noise from the system, the device will not accept pulses shorter than 3 ns (Typ.) input on WE , CE or OE . However, if a glitch exceeding 3 ns (Typ.) occurs and the glitch is input to the device malfunction may occur. The device uses standard JEDEC commands. It is conceivable that, in extreme cases, system noise may be misinterpreted as part of a command sequence input and that the device will acknowledge it. Then, even if a proper command is input, the device may not operate. To avoid this possibility, clear the Command Register before command input. In an environment prone to system noise, Toshiba recommend input of a software or hardware reset before command input. Protection against Malfunction at Power-on To prevent damage to data caused by sudden noise at power-on, when power is turned on with WE = CE = VIL the device does not latch the command on the first rising edge of WE or CE . Instead, the device automatically Resets the Command Register and enters Read Mode. 2002-10-24 20/68 TC58FVM7(T/B)2AFT(65/80) ABSOLUTE MAXIMUM RATINGS SYMBOL VDD VIN VDQ VIDH VACCH PD Tsolder Tstg Topr IOSHORT VDD Supply Voltage Input Voltage Input/Output Voltage Maximum Input Voltage for A9, OE and RESET Maximum Input Voltage for WP/ACC Power Dissipation Soldering Temperature (10s) Storage Temperature Operating Temperature Output Short-Circuit Current (1) PARAMETER RANGE -0.6~4.6 -0.6~VDD + 0.5 ( 4.6) -0.6~VDD + 0.5 ( 4.6) 13.0 10.5 126 260 -55~150 -40~85 100 UNIT V V V V V mW C C C mA (1) Outputs should be shorted for no more than one second. No more than one output should be shorted at a time. CAPACITANCE (Ta = 25C, f = 1 MHz) SYMBOL CIN COUT CIN2 Input Pin Capacitance Output Pin Capacitance Control Pin Capacitance PARAMETER CONDITION VIN = 0 V VOUT = 0 V VIN = 0 V MAX 8 5 7 UNIT pF pF pF This parameter is periodically sampled and is not tested for every device. RECOMMENDED DC OPERATING CONDITIONS SYMBOL VDD VIH VIL VID VACC Ta VDD Supply Voltage Input High-Level Voltage Input Low-Level Voltage High-Level Voltage for A9, OE and RESET High-Level Voltage for WP/ACC Operating Temperature (3) (3) PARAMETER MIN 2.3 0.7 x VDD -0.3 (1) MAX 3.6 VDD + 0.3 (2) UNIT 0.2 x VDD 12.6 9.5 85 V 11.4 8.5 -40 C (1) -2 V (pulse width of 20 ns max) (2) +2 V (pulse width of 20 ns max) (3) Do not apply VID/VACC when the supply voltage is not within the device's recommended operating voltage range. 2002-10-24 21/68 TC58FVM7(T/B)2AFT(65/80) DC CHARACTERISTICS SYMBOL ILI ILO VOH VOL IDDO1 IDDO2 IDDO3 IDDO4 IDDO5 IDDO6 PARAMETER Input Leakage Current Output Leakage Current Output High Voltage Output Low Voltage VDD Average Random Read Current CONDITION 0 V VIN VDD 0 V VOUT VDD IOH = -0.1 mA IOH = -2.5 mA IOL = 4.0 mA VIN = VIH/VIL, IOUT = 0 mA tRC = 100 ns (MIN) MIN VDD - 0.4 0.85 x VDD TYP 35 8 8 43 MAX 1 1 0.4 55 15 15 70 V UNIT A VDD Average Program Current VIN = VIH/VIL, IOUT = 0 mA VDD Average Erase Current VDD Average Read-While-Program Current VDD Average Read-while-Erase Current VDD Average Program-whileErase-Suspend Current VDD Average Page Read Current VIN = VIH/VIL, IOUT = 0 mA VIN = VIH/VIL, IOUT = 0 mA tRC = 100 ns (MIN) VIN = VIH/VIL, IOUT = 0 mA tRC = 100 ns (MIN) VIN = VIH/VIL, IOUT = 0 mA VIN = VIH/VIL, IOUT = 0 mA tPRC = 25ns(MIN) VIN = VIH/VIL, IOUT = 0 mA 43 70 mA 8 15 IDDO7 1 5 IDDO8 VDD Average Address (2) Increment Read Current tRC = 100 ns(MIN) tPRC = 25ns(MIN) 5 11 IDDS1 IDDS2 IID IACC VLKO VDD Standby Current VDD Standby Current (1) (Automatic Sleep Mode ) High-Voltage Input Current for A9, OE and RESET High-Voltage Input Current for WP/ACC Low-VDD Lock-out Voltage CE = RESET = VDD or RESET = VSS 1.5 2 10 A VIH = VDD VIL = VSS 11.4 V VID 12.6 V 8.5 V VACC 9.5 V 2 10 35 20 2.0 mA V (1) The device enters Automatic Sleep Mode in which the address remains fixed for during 150 ns. (2) (IDDO1+ IDDO7 x 7) 8words AC TEST CONDITIONS PARAMETER Input Pulse Level Input Pulse Rise and Fall Time (10%~90%) Timing Measurement Reference Level (input) Timing Measurement Reference Level (output) Output Load CONDITION VDD, 0.0 V 5 ns VDD/2 , VDD/2 VDD/2 , VDD/2 CL (100 pF) + 1 TTL Gate / CL (30 pF) + 1 TTL Gate 2002-10-24 22/68 TC58FVM7(T/B)2AFT(65/80) AC CHARACTERISTICS AND OPERATING CONDITIONS Product name VDD voltage (V) Output load capacitance (CL) Symbol tRC tPRC tACC tCE tOE tPACC tCEE tOEE tOH tDF1 tDF2 Read Cycle Time Page Read Cycle Time Address Access Time CE Access Time OE Access Time TC58FVM7T2ATG65 , TC58FVM7B2ATG65 VDD=2.7-3.6V 30 pF Min 65 25 0 0 0 Max 65 65 25 25 25 25 100 pF Min 70 30 0 0 0 Max 70 70 30 30 25 25 VDD=2.3-3.6V 30 pF Min 70 30 0 0 0 Max 70 70 30 30 25 25 100 pF Min 75 35 0 0 0 Max 75 75 35 35 25 25 ns ns ns ns ns ns ns ns ns ns ns Unit Parameter Page Access Time CE to Output Low-Z OE to Output Low-Z Output Data Hold Time CE to Output High-Z OE to Output High-Z Product name VDD voltage (V) Output load capacitance (CL) Symbol tRC tPRC tACC tCE tOE tPACC tCEE tOEE tOH tDF1 tDF2 Read Cycle Time Page Read Cycle Time Address Access Time CE Access Time OE Access Time TC58FVM7T2ATG80 , TC58FVM7B2ATG80 VDD=2.7-3.6V 30 pF Min 80 30 0 0 0 Max 80 80 30 30 25 25 100 pF Min 85 35 0 0 0 Max 85 85 35 35 25 25 VDD=2.3-3.6V 30 pF Min 85 35 0 0 0 Max 85 85 35 35 25 25 100 pF Min 90 40 0 0 0 Max 90 90 40 40 25 25 ns ns ns ns ns ns ns ns ns ns ns Unit Parameter Page Access Time CE to Output Low-Z OE to Output Low-Z Output Data Hold Time CE to Output High-Z OE to Output High-Z 2002-10-24 23/68 TC58FVM7(T/B)2AFT(65/80) BLOCK PROTECT SYMBOL tVPT tVPS tCESP tVPH tPPLH VID Transition Time VID Set-up Time CE Set-up Time OE Hold Time PARAMETER MIN 4 4 4 4 100 MAX UNIT s s s s s WE Low-Level Hold Time PROGRAM AND ERASE CHARACTERISTICS SYMBOL PARAMETER Auto-Program Time (Byte Mode) tPPW Auto-Program Time (Word Mode) tPPAW tPCEW tPBEW tEW Auto-Page program time Auto Chip Erase Time Auto Block Erase Time Erase/Program Cycle MIN 10 5 TYP. 8 11 45 184 0.7 MAX 300 300 2400 2630 10 UNIT s s s s s Cycles * Auto Chip Erase Time and Auto Block Erase Time include internal pre program time . 2002-10-24 24/68 TC58FVM7(T/B)2AFT(65/80) COMMAND WRITE/PROGRAM/ERASE CYCLE SYMBOL PARAMETER MIN tCMD tAS UNIT MAX 90 300 20 30 1.6 2.0 1 15 1 ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns s s ns ns ns s ns ns ns ns s s s s s Command Write Cycle Time Address Set-up Time / BYTE Set-up Time Address Hold Time / BYTE Hold Time Address Hold Time from WE High level Data Set-up Time Data Hold Time WE Low-Level Hold Time WE High-Level Hold Time CE Set-up Time to WE Active CE Hold Time from WE High Level CE Low-Level Hold Time CE High-Level Hold Time 65 0 30 20 30 0 tAH tAHW tDS tDH tWELH tWEHH tCES tCEH tCELH tCEHH tWES tWEH tOES tOEHP tOEHT tAHT tAST ( WE Control) ( WE Control) ( WE Control) ( WE Control) ( CE Control) ( CE Control) ( CE Control) ( CE Control) 30 20 0 0 30 20 0 0 0 10 20 0 0 50 500 500 0 50 5 WE Set-up time to CE Active WE Hold Time from CE High Level OE Set-up Time OE Hold Time (Toggle, Data Polling) OE High-Level Hold Time (Toggle) Address Hold Time (Toggle) Address Set-up Time (Toggle) Erase Hold Time VDD Set-up Time Program/Erase Valid to RY/BY Delay tBEH tVDS tBUSY Program/Erase Valid to RY/BY Delay during Suspend Mode tRP tREADY tRB tRH tCEBTS tBTD tSUSP tSUSPA tRESP tSUSE tRESE RESET Low-Level Hold Time RESET Low-Level to Read Mode RY/BY Recovery Time RESET Recovery Time CE Set-up time BYTE Transition BYTE to Output High-Z Program Suspend Command to Suspend Mode Page Program Suspend Command to Suspend Mode Program Resume Command to Program Mode Erase Suspend Command to Suspend Mode Erase Resume Command to Erase Mode 2002-10-24 25/68 TC58FVM7(T/B)2AFT(65/80) TIMING DIAGRAMS VIH or VIL Data invalid Read / ID Read Operation tRC Address tACC tCE CE tOH tOE tOEE OE tDF1 tAHW WE tOEH tCEE tDF2 DOUT Hi-Z Output data Valid Hi-Z ID Read Operation (apply VID to A9) tRC A0 A1 tACC A6 VID VIH A9 tVPS tCE CE tOE OE WE DOUT Read Mode Hi-Z Manufacturer code Hi-Z Device code Hi-Z Read Mode ID Read Mode 2002-10-24 26/68 TC58FVM7(T/B)2AFT(65/80) Page Read Operation Address(A3-22))) tRC Address(0-2) tACC tCE CE tPRC tOE OE WE tPACC DOUT Hi-Z DOUT DOUT DOUT DOUT DOUT DOUT DOUT DOUT Hi-Z Read after command input ( Only Hidden Rom / CFI Read) Address Last command address CE OE WE tWEHH+tACC DOUT Command data Hi-Z DOUT valid Hi-Z 2002-10-24 27/68 TC58FVM7(T/B)2AFT(65/80) Command Write Operation This is the timing of the Command Write Operation. The timing which is described in the following pages is essentially the same as the timing shown on this page. * WE Control tCMD Address tAS Command address tAH CE tCES tCEH WE tWEL tDS DIN tDH tWEHH Command data * CE Control tCMD Address tAS Command address tAH CE tCELH tWES WE tDS DIN tDH tWEH tCEHH Command data 2002-10-24 28/68 TC58FVM7(T/B)2AFT(65/80) ID Read Operation (input command sequence) BK + 555h BK + 00h tRC BK + 01h Address 555h tCMD 2AAh CE OE tOES WE DIN AAh 55h 90h Manufacturer code Device code DOUT Hi-Z Read Mode (input of ID Read command sequence) ID Read Mode (Continued) Address 555h tCMD 2AAh 555h CE OE WE DIN AAh 55h F0h DOUT Hi-Z ID Read Mode (input of Reset command sequence) Read Mode Note: Word Mode address shown. BK: Bank address 2002-10-24 29/68 TC58FVM7(T/B)2AFT(65/80) Auto-Program Operation (WE Control) Address 555h tCMD 2AAh 555h PA PA CE OE tOEHP tOES tPPW WE DIN AAh 55h A0h PD DOUT tVDS VDD Note: Word Mode address shown. PA: Program address PD: Program data Hi-Z DQ7 DOUT 2002-10-24 30/68 TC58FVM7(T/B)2AFT(65/80) Auto Page Program Operation ( WE Control) Address(A3-22) tCMD PA PA Address(A0-2) 555h 2AAh 555h 0h 1h 2h 3h 4h 5h 6h 7h 7h CE tOEHP OE tOES tPPAW WE DIN AAh 55h E6h PD1 PD2 PD3 PD4 PD5 PD6 PD7 PD8 DOUT tVDS Hi-Z DQ7 DOUT VDD Note: Word Mode address shown. PA: Program address PD: Program Data 2002-10-24 31/68 TC58FVM7(T/B)2AFT(65/80) Auto Chip Erase / Auto Block Erase Operation (WE Control) Address 555h tCMD 2AAh 555h 555h 2AAh 555h/BA CE OE tOES WE DIN tVDS VDD AAh 55h 80h AAh 55h 10h/30h Note: Word Mode address shown. BA: Block address for Auto Block Erase operation Auto-Program Operation (CE Control) Address 555h tCMD 2AAh 555h PA PA CE tPPW OE tOEHP tOES WE DIN AAh 55h A0h PD DOUT tVDS VDD Note: Word Mode address shown. PA: Program address PD: Program data Hi-Z DQ7 DOUT 2002-10-24 32/68 TC58FVM7(T/B)2AFT(65/80) Auto Page Program Operation ( CE Control) Address(A3-22) tCMD PA PA Address(A0-2) 555h 2AAh 555h 0h 1h 2h 3h 4h 5h 6h 7h 7h CE tOEHP OE tOES tPPAW WE DIN AAh 55h E6h PD1 PD2 PD3 PD4 PD5 PD6 PD7 PD8 DOUT tVDS Hi-Z DQ7 DOUT VDD Note: Word Mode address shown. PA: Program address PD: Program data 2002-10-24 33/68 TC58FVM7(T/B)2AFT(65/80) Auto Chip Erase / Auto Block Erase Operation ( CE Control) Address 555h tCMD 2AAh 555h 555h 2AAh 555h/BA CE OE tOES WE DIN tVDS VDD AAh 55h 80h AAh 55h 10h/30h Note: Word Mode address shown. BA: Block address for Auto Block Erase operation 2002-10-24 34/68 TC58FVM7(T/B)2AFT(65/80) Program/Erase Suspend Operation Address BK RA CE OE WE tOE DIN B0h tCE DOUT Hi-Z tSUSP/tSUSE RY/BY Program/Erase Mode RA: Read address Suspend Mode DOUT Hi-Z Program/Erase Resume Operation Address RA BK PA/BA CE OE tOES WE tDF1 tDF2 30h tRESP/tRESE tOE DIN tCE DOUT DOUT Hi-Z Flag Hi-Z RY/BY Suspend Mode PA: Program address BK: Bank address BA: Block address RA: Read address Flag: Hardware Sequence flag Program/Erase Mode 2002-10-24 35/68 TC58FVM7(T/B)2AFT(65/80) RY/BY during Auto Program/Erase Operation CE Command input sequence WE tBUSY During operation RY / BY Hardware Reset Operation WE tRB RESET tRP tREADY RY/BY Read after RESET tRC Address tRH RESET tACC tOH DOUT Hi-Z Output data valid 2002-10-24 36/68 TC58FVM7(T/B)2AFT(65/80) BYTE during Read Operation CE tCEBTS OE BYTE tBTD DQ0~DQ7 Data Output Data Output DQ8~DQ14 Data Output tACC DQ15/A-1 Data Output Address Input BYTE during Write Operation CE WE tAS BYTE tAH 2002-10-24 37/68 TC58FVM7(T/B)2AFT(65/80) Hardware Sequence Flag ( DATA Polling) Last Command Address tCMD Address PA/BA CE tCE tOE OE tDF1 tOEHP WE tPPW /tPCEW /tPBEW DIN Last Command Data tDF2 tACC tOH DQ7 DQ7 Valid Valid DQ0~DQ6 tBUSY RY/BY PA: Program address BA: Block address Invalid Valid Valid Hardware Sequence Flag (Toggle bit) Address tAST CE tAST tAHT tOEHT tAHT tCE OE tOEHP WE tOE DIN Last Command Data DQ2/6 tBUSY RY/BY Toggle Toggle Toggle Stop* Toggle Valid *DQ2/DQ6 stops toggling when auto operation has been completed. 2002-10-24 38/68 TC58FVM7(T/B)2AFT(65/80) Block Protect 1 Operation Block Protect Address BA Verify Block Protect A0 A1 tVPT A6 VID VIH A9 VID VIH OE tVPS tPPLH tVPH tVPH WE tCESP CE tOE DOUT Hi-Z 01h* Hi-Z BA: Block address *: 01h indicates that block is protected. 2002-10-24 39/68 TC58FVM7(T/B)2AFT(65/80) Block Protect 2 Operation BA + 1 Address tCMD A0 BA tCMD BA tCMD BA tRC A1 A6 CE OE tPPLH WE tVPS VID VIH RESET DIN 60h 60h 40h tOE 60h DOUT Hi-Z 01h* BA: Block address BA + 1: Address of next block *: 01h indicates that block is protected. 2002-10-24 40/68 TC58FVM7(T/B)2AFT(65/80) FLOWCHARTS Auto-Program Start Auto-Program Command Sequence (see below) DATA Polling or Toggle Bit Address = Address + 1 No Last Address? Yes Auto-Program Completed Auto-Program Command Sequence (address/data) 555h/AAh 2AAh/55h 555h/A0h Program Address/ Program Data Note: The above command sequence takes place in Word Mode. 2002-10-24 41/68 TC58FVM7(T/B)2AFT(65/80) Auto-Page Program START Auto page program command sequence (see below ) DATA Polling or Toggle Bit Address = Address + 1 No Last address? Yes Auto-Program Completed 555h/AAh 2AAh/55h 555h/E6h Program address (A2=0,A1=0,A0=0) / Program data Program address (A2=1,A1=0,A0=0) / Program data Program address (A2=0,A1=0,A0=1) / Program data Program address (A2=1,A1=0,A0=1) / Program data Program address (A2=0,A1=1,A0=0) / Program data Program address (A2=1,A1=1,A0=0) / Program data Program address (A2=0,A1=1,A0=1) / Program data Program address (A2=1,A1=1,A0=1) / Program data 2002-10-24 42/68 TC58FVM7(T/B)2AFT(65/80) Fast Program Start Fast Program Set Command Sequence (see below) Fast Program Command Sequence (see below) DATA Polling or Toggle Bit Address = Address + 1 No Last Address? Yes Program Sequence (see below) Fast Program Completed Fast Program Set Command Sequence (address/data) 555h/AAh Fast Program Command Sequence (address/data) XXXh/A0h Fast Program Reset Command Sequence (address/data) XXXh/90h 2AAh/55h Program Address/ Program Data XXXh/F0h 555h/20h 2002-10-24 43/68 TC58FVM7(T/B)2AFT(65/80) Auto Erase Start Auto Erase Command Sequence (see below) DATA Polling or Toggle Bit Auto Erase Completed Auto Chip Erase Command Sequence (address/data) Auto Block / Auto Multi-Block Erase Command Sequence (address/data) 555h/AAh 555h/AAh 2AAh/55h 2AAh/55h 555h/80h 555h/80h 555h/AAh 555h/AAh 2AAh/55h 2AAh/55h 555h/10h Block Address/30h Block Address/30h Additional address inputs during Auto Multi-Block Erase Block Address/30h Note: The above command sequence takes place in Word Mode. 2002-10-24 44/68 TC58FVM7(T/B)2AFT(65/80) DQ7 DATA Polling Start Read Byte (DQ0~DQ7) Addr. = VA DQ7 = Data? No No DQ5 = 1? Yes Read Byte (DQ0~DQ7) Addr. = VA DQ7 = Data? No Fail Pass Yes 1) 1) : DQ7 must be rechecked even if DQ5 = 1 because DQ7 may change at the same time as DQ5. Yes DQ6 Toggle Bit Start Read Byte (DQ0~DQ7) Addr. = VA DQ6 = Toggle? Yes No DQ5 = 1? Yes Read Byte (DQ0~DQ7) Addr. = VA DQ6 = Toggle? Yes Fail Pass No 1) 1) : DQ6 must be rechecked even if DQ5 = 1 because DQ6 may stop toggling at the same time that DQ5 changes to 1. No VA: Byte address for programming Any of the addresses within the block being erased during a Block Erase operation "Don't care" during a Chip Erase operation Any address not within the current block during an Erase Suspend operation 2002-10-24 45/68 TC58FVM7(T/B)2AFT(65/80) Block Protect 1 Start PLSCNT = 1 Set up Block Address Addr. = BPA Wait for 4 s OE = A9 = VID, CE = VIL Wait for 4 s WE = VIL Wait for 100 s WE = VIH PLSCNT = PLSCNT + 1 Wait for 4 s OE = VIH Wait for 4 s OE = VIL Verify Block Protect No Data = 01H? Yes Yes Protect Another Block? No Remove VID from A9 Block Protect Complete No PLSCNT = 25? Yes Device Failed BPA: Block Address and ID Read Address (A6, A1, A0) ID Read Address = (0, 1, 0) 2002-10-24 46/68 TC58FVM7(T/B)2AFT(65/80) Block Protect 2 Start RESET = VID Wait for 4 s PLSCNT = 1 Block Protect 2 Command First Bus Write Cycle (XXXh/60h) Set up Address Addr. = BPA Block Protect 2 Command Second Bus Write Cycle (BPA/60h) Wait for 100 s Block Protect 2 Command Third Bus Write Cycle (XXXh/40h) PLSCNT = PLSCNT + 1 Verify Block Protect No Data = 01h? Yes Yes Protect Another Block? No Remove VID from RESET Reset Command No PLSCNT = 25? Yes Remove VID from RESET Reset Command Device Failed Block Protect Complete BPA: Block Address and ID Read Address (A6, A1, A0) ID Read Address = (0, 1, 0) 2002-10-24 47/68 TC58FVM7(T/B)2AFT(65/80) BLOCK ADDRESS TABLES (1) TC58FVM7T2A (top boot block) BLOCK ADDRESS BANK # BLOCK # BANK ADDRESS A22 A21 A20 A19 A18 A17 A16 A15 A14 A13 A12 BA0 BA1 BA2 BA3 BA4 BA5 BA6 BA7 BA8 BA9 BA10 BA11 BA12 BA13 BA14 BA15 BK0 BA16 BA17 BA18 BA19 BA20 BA21 BA22 BA23 BA24 BA25 BA26 BA27 BA28 BA29 BA30 BA31 L L L L L L L L L L L L L L L L L L L L L L L L L L L L L L L L L L L L L L L L L L L L L L L L H H H H H H H H H H H H H H H H L L L L L L L L H H H H H H H H L L L L H H H H L L L L H H H H L L H H L L H H L L H H L L H H L H L H L H L H L H L H L H L H * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * 100000h~10FFFFh 110000h~11FFFFh 120000h~12FFFFh 130000h~13FFFFh 140000h~14FFFFh 150000h~15FFFFh 160000h~16FFFFh 170000h~17FFFFh 180000h~18FFFFh 190000h~19FFFFh 1A0000h~1AFFFFh 1B0000h~1BFFFFh 1C0000h~1CFFFFh 1D0000h~1DFFFFh 1E0000h~1EFFFFh 1F0000h~1FFFFFh 080000h~087FFFh 088000h~08FFFFh 090000h~097FFFh 098000h~09FFFFh 0A0000h~0A7FFFh 0A8000h~0AFFFFh 0B0000h~0B7FFFh 0B8000h~0BFFFFh 0C0000h~0C7FFFh 0C8000h~0CFFFFh 0D0000h~0D7FFFh 0D8000h~0DFFFFh 0E0000h~0E7FFFh 0E8000h~0EFFFFh 0F0000h~0F7FFFh 0F8000h~0FFFFFh L L L L L L L L L L L L L L L L L L L L L L L L L L L L L L L L L L L L L L L L L L L L L L L L L L L L L L L L L L L L L L L L L L L L L L L L H H H H H H H H L L L L H H H H L L L L H H H H L L H H L L H H L L H H L L H H L H L H L H L H L H L H L H L H * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * ADDRESS RANGE BYTE MODE 000000h~00FFFFh 010000h~01FFFFh 020000h~02FFFFh 030000h~03FFFFh 040000h~04FFFFh 050000h~05FFFFh 060000h~06FFFFh 070000h~07FFFFh 080000h~08FFFFh 090000h~09FFFFh 0A0000h~0AFFFFh 0B0000h~0BFFFFh 0C0000h~0CFFFFh 0D0000h~0DFFFFh 0E0000h~0EFFFFh 0F0000h~0FFFFFh WORD MODE 000000h~007FFFh 008000h~00FFFFh 010000h~017FFFh 018000h~01FFFFh 020000h~027FFFh 028000h~02FFFFh 030000h~037FFFh 038000h~03FFFFh 040000h~047FFFh 048000h~04FFFFh 050000h~057FFFh 058000h~05FFFFh 060000h~067FFFh 068000h~06FFFFh 070000h~077FFFh 078000h~07FFFFh 2002-10-24 48/68 TC58FVM7(T/B)2AFT(65/80) BLOCK ADDRESS BANK # BLOCK # BANK ADDRESS A22 A21 A20 A19 A18 A17 A16 A15 A14 A13 A12 BA32 BA33 BA34 BA35 BA36 BA37 BA38 BA39 BA40 BA41 BA42 BA43 BA44 BA45 BA46 BA47 BK1 BA48 BA49 BA50 BA51 BA52 BA53 BA54 BA55 BA56 BA57 BA58 BA59 BA60 BA61 BA62 BA63 L L L L L L L L L L L L L L L L L L L L L L L L L L L L L L L L H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H L L L L L L L L H H H H H H H H L L L L H H H H L L L L H H H H L L H H L L H H L L H H L L H H L H L H L H L H L H L H L H L H * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * 300000h~30FFFFh 310000h~31FFFFh 320000h~32FFFFh 330000h~33FFFFh 340000h~34FFFFh 350000h~35FFFFh 360000h~36FFFFh 370000h~37FFFFh 380000h~38FFFFh 390000h~39FFFFh 3A0000h~3AFFFFh 3B0000h~3BFFFFh 3C0000h~3CFFFFh 3D0000h~3DFFFFh 3E0000h~3EFFFFh 3F0000h~3FFFFFh 180000h~187FFFh 188000h~18FFFFh 190000h~197FFFh 198000h~19FFFFh 1A0000h~1A7FFFh 1A8000h~1AFFFFh 1B0000h~1B7FFFh 1B8000h~1BFFFFh 1C0000h~1C7FFFh 1C8000h~1CFFFFh 1D0000h~1D7FFFh 1D8000h~1DFFFFh 1E0000h~1E7FFFh 1E8000h~1EFFFFh 1F0000h~1F7FFFh 1F8000h~1FFFFFh L L L L L L L L L L L L L L L L L L L L L L L L L L L L L L L L H H H H H H H H H H H H H H H H L L L L L L L L L L L L L L L L L L L L L L L L H H H H H H H H L L L L H H H H L L L L H H H H L L H H L L H H L L H H L L H H L H L H L H L H L H L H L H L H * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * ADDRESS RANGE BYTE MODE 200000h~20FFFFh 210000h~21FFFFh 220000h~22FFFFh 230000h~23FFFFh 240000h~24FFFFh 250000h~25FFFFh 260000h~26FFFFh 270000h~27FFFFh 280000h~28FFFFh 290000h~29FFFFh 2A0000h~2AFFFFh 2B0000h~2BFFFFh 2C0000h~2CFFFFh 2D0000h~2DFFFFh 2E0000h~2EFFFFh 2F0000h~2FFFFFh WORD MODE 100000h~107FFFh 108000h~10FFFFh 110000h~117FFFh 118000h~11FFFFh 120000h~127FFFh 128000h~12FFFFh 130000h~137FFFh 138000h~13FFFFh 140000h~147FFFh 148000h~14FFFFh 150000h~157FFFh 158000h~15FFFFh 160000h~167FFFh 168000h~16FFFFh 170000h~177FFFh 178000h~17FFFFh 2002-10-24 49/68 TC58FVM7(T/B)2AFT(65/80) BLOCK ADDRESS BANK # BLOCK # BANK ADDRESS A22 A21 A20 A19 A18 A17 A16 A15 A14 A13 A12 BA64 BA65 BA66 BA67 BA68 BA69 BA70 BA71 BA72 BA73 BA74 BA75 BA76 BA77 BA78 BA79 BK1 BA80 BA81 BA82 BA83 BA84 BA85 BA86 BA87 BA88 BA89 BA90 BA91 BA92 BA93 BA94 BA95 L L L L L L L L L L L L L L L L H H H H H H H H H H H H H H H H L L L L L L L L L L L L L L L L H H H H H H H H H H H H H H H H L L L L L L L L H H H H H H H H L L L L H H H H L L L L H H H H L L H H L L H H L L H H L L H H L H L H L H L H L H L H L H L H * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * 500000h~50FFFFh 510000h~51FFFFh 520000h~52FFFFh 530000h~53FFFFh 540000h~54FFFFh 550000h~55FFFFh 560000h~56FFFFh 570000h~57FFFFh 580000h~58FFFFh 590000h~59FFFFh 5A0000h~5AFFFFh 5B0000h~5BFFFFh 5C0000h~5CFFFFh 5D0000h~5DFFFFh 5E0000h~5EFFFFh 5F0000h~5FFFFFh 280000h~287FFFh 288000h~28FFFFh 290000h~297FFFh 298000h~29FFFFh 2A0000h~2A7FFFh 2A8000h~2AFFFFh 2B0000h~2B7FFFh 2B8000h~2BFFFFh 2C0000h~2C7FFFh 2C8000h~2CFFFFh 2D0000h~2D7FFFh 2D8000h~2DFFFFh 2E0000h~2E7FFFh 2E8000h~2EFFFFh 2F0000h~2F7FFFh 2F8000h~2FFFFFh L L L L L L L L L L L L L L L L H H H H H H H H H H H H H H H H L L L L L L L L L L L L L L L L L L L L L L L L L L L L L L L L L L L L L L L L H H H H H H H H L L L L H H H H L L L L H H H H L L H H L L H H L L H H L L H H L H L H L H L H L H L H L H L H * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * ADDRESS RANGE BYTE MODE 400000h~40FFFFh 410000h~41FFFFh 420000h~42FFFFh 430000h~43FFFFh 440000h~44FFFFh 450000h~45FFFFh 460000h~46FFFFh 470000h~47FFFFh 480000h~48FFFFh 490000h~49FFFFh 4A0000h~4AFFFFh 4B0000h~4BFFFFh 4C0000h~4CFFFFh 4D0000h~4DFFFFh 4E0000h~4EFFFFh 4F0000h~4FFFFFh WORD MODE 200000h~207FFFh 208000h~20FFFFh 210000h~217FFFh 218000h~21FFFFh 220000h~227FFFh 228000h~22FFFFh 230000h~237FFFh 238000h~23FFFFh 240000h~247FFFh 248000h~24FFFFh 250000h~257FFFh 258000h~25FFFFh 260000h~267FFFh 268000h~26FFFFh 270000h~277FFFh 278000h~27FFFFh 2002-10-24 50/68 TC58FVM7(T/B)2AFT(65/80) BLOCK ADDRESS BANK # BLOCK # BANK ADDRESS A22 A21 A20 A19 A18 A17 A16 A15 A14 A13 A12 BA96 BA97 BA98 BA99 BA100 BA101 BA102 BA103 BA104 BA105 BA106 BA107 BA108 BA109 BA110 BA111 BK1 BA112 BA113 BA114 BA115 BA116 BA117 BA118 BA119 BA120 BA121 BA122 BA123 BA124 BA125 BA126 BA127 L L L L L L L L L L L L L L L L H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H L L L L L L L L H H H H H H H H L L L L H H H H L L L L H H H H L L H H L L H H L L H H L L H H L H L H L H L H L H L H L H L H * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * 700000h~70FFFFh 710000h~71FFFFh 720000h~72FFFFh 730000h~73FFFFh 740000h~74FFFFh 770000h~75FFFFh 760000h~76FFFFh 770000h~77FFFFh 780000h~78FFFFh 790000h~79FFFFh 7A0000h~7AFFFFh 7B0000h~7BFFFFh 7C0000h~7CFFFFh 7D0000h~7DFFFFh 7E0000h~7EFFFFh 7F0000h~7FFFFFh 380000h~387FFFh 388000h~38FFFFh 390000h~397FFFh 398000h~39FFFFh 3A0000h~3A7FFFh 3A8000h~3AFFFFh 3B0000h~3B7FFFh 3B8000h~3BFFFFh 3C0000h~3C7FFFh 3C8000h~3CFFFFh 3D0000h~3D7FFFh 3D8000h~3DFFFFh 3E0000h~3E7FFFh 3E8000h~3EFFFFh 3F0000h~3F7FFFh 3F8000h~3FFFFFh L L L L L L L L L L L L L L L L H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H L L L L L L L L L L L L L L L L L L L L L L L L H H H H H H H H L L L L H H H H L L L L H H H H L L H H L L H H L L H H L L H H L H L H L H L H L H L H L H L H * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * ADDRESS RANGE BYTE MODE 600000h~60FFFFh 610000h~61FFFFh 620000h~62FFFFh 630000h~63FFFFh 640000h~64FFFFh 650000h~65FFFFh 660000h~66FFFFh 670000h~67FFFFh 680000h~68FFFFh 690000h~69FFFFh 6A0000h~6AFFFFh 6B0000h~6BFFFFh 6C0000h~6CFFFFh 6D0000h~6DFFFFh 6E0000h~6EFFFFh 6F0000h~6FFFFFh WORD MODE 300000h~307FFFh 308000h~30FFFFh 310000h~317FFFh 318000h~31FFFFh 320000h~327FFFh 328000h~32FFFFh 330000h~337FFFh 338000h~33FFFFh 340000h~347FFFh 348000h~34FFFFh 350000h~357FFFh 358000h~35FFFFh 360000h~367FFFh 368000h~36FFFFh 370000h~377FFFh 378000h~37FFFFh 2002-10-24 51/68 TC58FVM7(T/B)2AFT(65/80) BLOCK ADDRESS BANK # BLOCK # BANK ADDRESS A22 A21 A20 A19 A18 A17 A16 A15 A14 A13 A12 BA128 BA129 BA130 BA131 BA132 BA133 BA134 BA135 BA136 BA137 BA138 BA139 BA140 BA141 BA142 BA143 BK2 BA144 BA145 BA146 BA147 BA148 BA149 BA150 BA151 BA152 BA153 BA154 BA155 BA156 BA157 BA158 BA159 H H H H H H H H H H H H H H H H L L L L L L L L L L L L L L L L L L L L L L L L L L L L L L L L H H H H H H H H H H H H H H H H L L L L L L L L H H H H H H H H L L L L H H H H L L L L H H H H L L H H L L H H L L H H L L H H L H L H L H L H L H L H L H L H * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * 900000h~90FFFFh 910000h~91FFFFh 920000h~92FFFFh 930000h~93FFFFh 940000h~94FFFFh 950000h~95FFFFh 960000h~96FFFFh 970000h~97FFFFh 980000h~98FFFFh 990000h~99FFFFh 9A0000h~9AFFFFh 9B0000h~9BFFFFh 9C0000h~9CFFFFh 9D0000h~9DFFFFh 9E0000h~9EFFFFh 9F0000h~9FFFFFh 480000h~487FFFh 488000h~48FFFFh 490000h~497FFFh 498000h~49FFFFh 4A0000h~4A7FFFh 4A8000h~4AFFFFh 4B0000h~4B7FFFh 4B8000h~4BFFFFh 4C0000h~4C7FFFh 4C8000h~4CFFFFh 4D0000h~4D7FFFh 4D8000h~4DFFFFh 4E0000h~4E7FFFh 4E8000h~4EFFFFh 4F0000h~4F7FFFh 4F8000h~4FFFFFh H H H H H H H H H H H H H H H H L L L L L L L L L L L L L L L L L L L L L L L L L L L L L L L L L L L L L L L L L L L L L L L L L L L L L L L L H H H H H H H H L L L L H H H H L L L L H H H H L L H H L L H H L L H H L L H H L H L H L H L H L H L H L H L H * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * ADDRESS RANGE BYTE MODE 800000h~80FFFFh 810000h~81FFFFh 820000h~82FFFFh 830000h~83FFFFh 840000h~84FFFFh 850000h~85FFFFh 860000h~86FFFFh 870000h~87FFFFh 880000h~88FFFFh 890000h~89FFFFh 8A0000h~8AFFFFh 8B0000h~8BFFFFh 8C0000h~8CFFFFh 8D0000h~8DFFFFh 8E0000h~8EFFFFh 8F0000h~8FFFFFh WORD MODE 400000h~407FFFh 408000h~40FFFFh 410000h~417FFFh 418000h~41FFFFh 420000h~427FFFh 428000h~42FFFFh 430000h~437FFFh 438000h~43FFFFh 440000h~447FFFh 448000h~44FFFFh 450000h~457FFFh 458000h~45FFFFh 460000h~467FFFh 468000h~46FFFFh 470000h~477FFFh 478000h~47FFFFh 2002-10-24 52/68 TC58FVM7(T/B)2AFT(65/80) BLOCK ADDRESS BANK # BLOCK # BANK ADDRESS A22 A21 A20 A19 A18 A17 A16 A15 A14 A13 A12 BA160 BA161 BA162 BA163 BA164 BA165 BA166 BA167 BA168 BA169 BA170 BA171 BA172 BA173 BA174 BA175 BK2 BA176 BA177 BA178 BA179 BA180 BA181 BA182 BA183 BA184 BA185 BA186 BA187 BA188 BA189 BA190 BA191 H H H H H H H H H H H H H H H H L L L L L L L L L L L L L L L L H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H L L L L L L L L H H H H H H H H L L L L H H H H L L L L H H H H L L H H L L H H L L H H L L H H L H L H L H L H L H L H L H L H * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * A00000h~A0FFFFh A10000h~A1FFFFh A20000h~A2FFFFh A30000h~A3FFFFh A40000h~A4FFFFh A50000h~A5FFFFh A60000h~A6FFFFh A70000h~A7FFFFh A80000h~A8FFFFh A90000h~A9FFFFh 580000h~587FFFh 588000h~58FFFFh 590000h~597FFFh 598000h~59FFFFh 5A0000h~5A7FFFh 5A8000h~5AFFFFh 5B0000h~5B7FFFh 5B8000h~5BFFFFh 5C0000h~5C7FFFh 5C8000h~5CFFFFh H H H H H H H H H H H H H H H H L L L L L L L L L L L L L L L L H H H H H H H H H H H H H H H H L L L L L L L L L L L L L L L L L L L L L L L L H H H H H H H H L L L L H H H H L L L L H H H H L L H H L L H H L L H H L L H H L H L H L H L H L H L H L H L H * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * ADDRESS RANGE BYTE MODE A00000h~A0FFFFh A10000h~A1FFFFh A20000h~A2FFFFh A30000h~A3FFFFh A40000h~A4FFFFh A50000h~A5FFFFh A60000h~A6FFFFh A70000h~A7FFFFh A80000h~A8FFFFh A90000h~A9FFFFh AA0000h~AAFFFFh AB0000h~ABFFFFh AC0000h~ACFFFFh AD0000h~ADFFFFh AE0000h~AEFFFFh AF0000h~AFFFFFh WORD MODE 500000h~507FFFh 508000h~50FFFFh 510000h~517FFFh 518000h~51FFFFh 520000h~527FFFh 528000h~52FFFFh 530000h~537FFFh 538000h~53FFFFh 540000h~547FFFh 548000h~54FFFFh 550000h~557FFFh 558000h~55FFFFh 560000h~567FFFh 568000h~56FFFFh 570000h~577FFFh 578000h~57FFFFh AA0000h~AAFFFFh 5D0000h~5D7FFFh AB0000h~ABFFFFh 5D8000h~5DFFFFh AC0000h~ACFFFFh 5E0000h~5E7FFFh AD0000h~ADFFFFh 5E8000h~5EFFFFh AE0000h~AEFFFFh AF0000h~AFFFFFh 5F0000h~5F7FFFh 5F8000h~5FFFFFh 2002-10-24 53/68 TC58FVM7(T/B)2AFT(65/80) BLOCK ADDRESS BANK # BLOCK # BANK ADDRESS A22 A21 A20 A19 A18 A17 A16 A15 A14 A13 A12 BA192 BA193 BA194 BA195 BA196 BA197 BA198 BA199 BA200 BA201 BA202 BA203 BA204 BA205 BA206 BA207 BK2 BA208 BA209 BA210 BA211 BA212 BA213 BA214 BA215 BA216 BA217 BA218 BA219 BA220 BA221 BA222 BA223 H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H L L L L L L L L L L L L L L L L H H H H H H H H H H H H H H H H L L L L L L L L H H H H H H H H L L L L H H H H L L L L H H H H L L H H L L H H L L H H L L H H L H L H L H L H L H L H L H L H * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * C00000h~C0FFFFh C10000h~C1FFFFh C20000h~C2FFFFh C30000h~C3FFFFh C40000h~C4FFFFh C50000h~C5FFFFh C60000h~C6FFFFh C70000h~C7FFFFh C80000h~C8FFFFh 680000h~687FFFh 688000h~68FFFFh 690000h~697FFFh 698000h~69FFFFh 6A0000h~6A7FFFh 6A8000h~6AFFFFh 6B0000h~6B7FFFh 6B8000h~6BFFFFh 6C0000h~6C7FFFh H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H L L L L L L L L L L L L L L L L L L L L L L L L L L L L L L L L L L L L L L L L H H H H H H H H L L L L H H H H L L L L H H H H L L H H L L H H L L H H L L H H L H L H L H L H L H L H L H L H * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * ADDRESS RANGE BYTE MODE B00000h~B0FFFFh B10000h~B1FFFFh B20000h~B2FFFFh B30000h~B3FFFFh B40000h~B4FFFFh B50000h~B5FFFFh B60000h~B6FFFFh B70000h~B7FFFFh B80000h~B8FFFFh B90000h~B9FFFFh BA0000h~BAFFFFh BB0000h~BBFFFFh BC0000h~BCFFFFh BD0000h~BDFFFFh BE0000h~BEFFFFh BF0000h~BFFFFFh WORD MODE 600000h~607FFFh 608000h~60FFFFh 610000h~617FFFh 618000h~61FFFFh 620000h~627FFFh 628000h~62FFFFh 630000h~637FFFh 638000h~63FFFFh 640000h~647FFFh 648000h~64FFFFh 650000h~657FFFh 658000h~65FFFFh 660000h~667FFFh 668000h~66FFFFh 670000h~677FFFh 678000h~67FFFFh C90000h~C9FFFFh 6C8000h~6CFFFFh CA0000h~CAFFFFh 6D0000h~6D7FFFh CB0000h~CBFFFFh 6D8000h~6DFFFFh CC0000h~CCFFFFh 6E0000h~6E7FFFh CD0000h~CDFFFFh 6E8000h~6EFFFFh CE0000h~CEFFFFh CF0000h~CFFFFFh 6F0000h~6F7FFFh 6F8000h~6FFFFFh 2002-10-24 54/68 TC58FVM7(T/B)2AFT(65/80) BLOCK ADDRESS BANK # BLOCK # BANK ADDRESS A22 A21 A20 A19 A18 A17 A16 A15 A14 A13 A12 BA224 BA225 BA226 BA227 BA228 BA229 BA230 BA231 BA232 BA233 BA234 BA235 BA236 BA237 BA238 BK3 BA239 BA240 BA241 BA242 BA243 BA244 BA245 BA246 BA247 BA248 BA249 BA250 BA251 BA252 BA253 BA254 H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H L L L L L L L L L L L L L L L L H H H H H H H H H H H H H H H L L L L L L L L H H H H H H H H L L L L L L L L H H H H H H H L L L L H H H H L L L L H H H H L L L L H H H H L L L L H H H L L H H L L H H L L H H L L H H L L H H L L H H L L H H L L H L H L H L H L H L H L H L H L H L H L H L H L H L H L H L H L * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * ADDRESS RANGE BYTE MODE D00000h~D0FFFFh D10000h~D1FFFFh D20000h~D2FFFFh D30000h~D3FFFFh D40000h~D4FFFFh D50000h~D5FFFFh D60000h~D6FFFFh D70000h~D7FFFFh D80000h~D8FFFFh D90000h~D9FFFFh DA0000h~DAFFFFh DB0000h~DBFFFFh DC0000h~DCFFFFh WORD MODE 700000h~707FFFh 708000h~70FFFFh 710000h~717FFFh 718000h~71FFFFh 720000h~727FFFh 728000h~72FFFFh 730000h~737FFFh 738000h~73FFFFh 740000h~747FFFh 748000h~74FFFFh 750000h~757FFFh 758000h~75FFFFh 760000h~767FFFh DD0000h~DDFFFFh 768000h~76FFFFh DE0000h~DEFFFFh DF0000h~DFFFFFh E00000h~E0FFFFh E10000h~E1FFFFh E20000h~E2FFFFh E30000h~E3FFFFh E40000h~E4FFFFh E70000h~E5FFFFh E60000h~E6FFFFh E70000h~E7FFFFh E80000h~E8FFFFh E90000h~E9FFFFh 770000h~777FFFh 778000h~77FFFFh 780000h~787FFFh 788000h~78FFFFh 790000h~797FFFh 798000h~79FFFFh 7A0000h~7A7FFFh 7A8000h~7AFFFFh 7B0000h~7B7FFFh 7B8000h~7BFFFFh 7C0000h~7C7FFFh 7C8000h~7CFFFFh EA0000h~EAFFFFh 7D0000h~7D7FFFh EB0000h~EBFFFFh 7D8000h~7DFFFFh EC0000h~ECFFFFh 7E0000h~7E7FFFh ED0000h~EDFFFFh 7E8000h~7EFFFFh EE0000h~EEFFFFh 7F0000h~7F7FFFh 2002-10-24 55/68 TC58FVM7(T/B)2AFT(65/80) BLOCK ADDRESS BANK # BLOCK # BANK ADDRESS A22 A21 A20 A19 A18 A17 A16 A15 A14 A13 A12 BA255 BA256 BA257 BA258 BK3 BA259 BA260 BA261 BA262 H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H L L H H L H L H EF8000h~EF9FFFh 7FC000h~7FCFFFh EFA000h~EFBFFFh 7FD000h~7FDFFFh EFC000h~EFDFFFh 7FE000h~7FEFFFh EFE000h~EFFFFFh 7FF000h~7FFFFFh H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H L L L L L L H H L H L H ADDRESS RANGE BYTE MODE EF0000h~EF1FFFh EF2000h~EF3FFFh EF4000h~EF5FFFh EF6000h~EF7FFFh WORD MODE 7F8000h~7F8FFFh 7F9000h~7F9FFFh 7FA00h~7FAFFFh 7FB000h~7FBFFFh (2) TC58FVM7B2A (bottom boot block) BLOCK ADDRESS BANK # BLOCK # BANK ADDRESS A22 A21 A20 A19 A18 A17 A16 A15 A14 A13 A12 BA0 BA1 BA2 BA3 BK0 BA4 BA5 BA6 BA7 L L L L L L L L L L L L L L L L L L L L L L L L L L L L L L L L H H H H L L H H L H L H 008000h~009FFFh 00A000h~00BFFFh 00C000h~00DFFFh 00E000h~00FFFFh 004000h~004FFFh 005000h~005FFFh 006000h~006FFFh 007000h~007FFFh L L L L L L L L L L L L L L L L L L L L L L L L L L L L L L L L L L L L L L H H L H L H ADDRESS RANGE BYTE MODE 000000h~001FFFh 002000h~003FFFh 004000h~005FFFh 006000h~007FFFh WORD MODE 000000h~000FFFh 001000h~001FFFh 00200h~002FFFh 003000h~003FFFh 2002-10-24 56/68 TC58FVM7(T/B)2AFT(65/80) BLOCK ADDRESS BANK # BLOCK # BANK ADDRESS A22 A21 A20 A19 A18 A17 A16 A15 A14 A13 A12 BA8 BA9 BA10 BA11 BA12 BA13 BA14 BA15 BA16 BA17 BA18 BA19 BA20 BA21 BA22 BK0 BA23 BA24 BA25 BA26 BA27 BA28 BA29 BA30 BA31 BA32 BA33 BA34 BA35 BA36 BA37 BA38 L L L L L L L L L L L L L L L L L L L L L L L L L L L L L L L L L L L L L L L L L L L L L L L L L L L L L L L L L L L L L L L L L L L L L L L L L L L L L L L L L L L L L L L L L L L L L L L L L L L L L L L L L L L L H H H H H H H H H H H H H H H H L L L L L L L H H H H H H H H L L L L L L L L H H H H H H H H L L L H H H H L L L L H H H H L L L L H H H H L L L L H H H H L H H L L H H L L H H L L H H L L H H L L H H L L H H L L H H H L H L H L H L H L H L H L H L H L H L H L H L H L H L H L H * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * ADDRESS RANGE BYTE MODE 010000h~01FFFFh 020000h~02FFFFh 030000h~03FFFFh 040000h~04FFFFh 050000h~05FFFFh 060000h~06FFFFh 070000h~07FFFFh 080000h~08FFFFh 090000h~09FFFFh 0A0000h~0AFFFFh 0B0000h~0BFFFFh 0C0000h~0CFFFFh 0D0000h~0DFFFFh 0E0000h~0EFFFFh 0F0000h~0FFFFFh 100000h~10FFFFh 110000h~11FFFFh 120000h~12FFFFh 130000h~13FFFFh 140000h~14FFFFh 150000h~15FFFFh 160000h~16FFFFh 170000h~17FFFFh 180000h~18FFFFh 190000h~19FFFFh 1A0000h~1AFFFFh 1B0000h~1BFFFFh 1C0000h~1CFFFFh 1D0000h~1DFFFFh 1E0000h~1EFFFFh 1F0000h~1FFFFFh WORD MODE 008000h~00FFFFh 010000h~017FFFh 018000h~01FFFFh 020000h~027FFFh 028000h~02FFFFh 030000h~037FFFh 038000h~03FFFFh 040000h~047FFFh 048000h~04FFFFh 050000h~057FFFh 058000h~05FFFFh 060000h~067FFFh 068000h~06FFFFh 070000h~077FFFh 078000h~07FFFFh 080000h~087FFFh 088000h~08FFFFh 090000h~097FFFh 098000h~09FFFFh 0A0000h~0A7FFFh 0A8000h~0AFFFFh 0B0000h~0B7FFFh 0B8000h~0BFFFFh 0C0000h~0C7FFFh 0C8000h~0CFFFFh 0D0000h~0D7FFFh 0D8000h~0DFFFFh 0E0000h~0E7FFFh 0E8000h~0EFFFFh 0F0000h~0F7FFFh 0F8000h~0FFFFFh 2002-10-24 57/68 TC58FVM7(T/B)2AFT(65/80) BLOCK ADDRESS BANK # BLOCK # BANK ADDRESS A22 A21 A20 A19 A18 A17 A16 A15 A14 A13 A12 BA39 BA40 BA41 BA42 BA43 BA44 BA45 BA46 BA47 BA48 BA49 BA50 BA51 BA52 BA53 BA54 BK1 BA55 BA56 BA57 BA58 BA59 BA60 BA61 BA62 BA63 BA64 BA65 BA66 BA67 BA68 BA69 BA70 L L L L L L L L L L L L L L L L L L L L L L L L L L L L L L L L H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H L L L L L L L L H H H H H H H H L L L L H H H H L L L L H H H H L L H H L L H H L L H H L L H H L H L H L H L H L H L H L H L H * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * 300000h~30FFFFh 310000h~31FFFFh 320000h~32FFFFh 330000h~33FFFFh 340000h~34FFFFh 350000h~35FFFFh 360000h~36FFFFh 370000h~37FFFFh 380000h~38FFFFh 390000h~39FFFFh 3A0000h~3AFFFFh 3B0000h~3BFFFFh 3C0000h~3CFFFFh 3D0000h~3DFFFFh 3E0000h~3EFFFFh 3F0000h~3FFFFFh 180000h~187FFFh 188000h~18FFFFh 190000h~197FFFh 198000h~19FFFFh 1A0000h~1A7FFFh 1A8000h~1AFFFFh 1B0000h~1B7FFFh 1B8000h~1BFFFFh 1C0000h~1C7FFFh 1C8000h~1CFFFFh 1D0000h~1D7FFFh 1D8000h~1DFFFFh 1E0000h~1E7FFFh 1E8000h~1EFFFFh 1F0000h~1F7FFFh 1F8000h~1FFFFFh L L L L L L L L L L L L L L L L L L L L L L L L L L L L L L L L H H H H H H H H H H H H H H H H L L L L L L L L L L L L L L L L L L L L L L L L H H H H H H H H L L L L H H H H L L L L H H H H L L H H L L H H L L H H L L H H L H L H L H L H L H L H L H L H * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * ADDRESS RANGE BYTE MODE 200000h~20FFFFh 210000h~21FFFFh 220000h~22FFFFh 230000h~23FFFFh 240000h~24FFFFh 250000h~25FFFFh 260000h~26FFFFh 270000h~27FFFFh 280000h~28FFFFh 290000h~29FFFFh 2A0000h~2AFFFFh 2B0000h~2BFFFFh 2C0000h~2CFFFFh 2D0000h~2DFFFFh 2E0000h~2EFFFFh 2F0000h~2FFFFFh WORD MODE 100000h~107FFFh 108000h~10FFFFh 110000h~117FFFh 118000h~11FFFFh 120000h~127FFFh 128000h~12FFFFh 130000h~137FFFh 138000h~13FFFFh 140000h~147FFFh 148000h~14FFFFh 150000h~157FFFh 158000h~15FFFFh 160000h~167FFFh 168000h~16FFFFh 170000h~177FFFh 178000h~17FFFFh 2002-10-24 58/68 TC58FVM7(T/B)2AFT(65/80) BLOCK ADDRESS BANK # BLOCK # BANK ADDRESS A22 A21 A20 A19 A18 A17 A16 A15 A14 A13 A12 BA71 BA72 BA73 BA74 BA75 BA76 BA77 BA78 BA79 BA80 BA81 BA82 BA83 BA84 BA85 BA86 BK1 BA87 BA88 BA89 BA90 BA91 BA92 BA93 BA94 BA95 BA96 BA97 BA98 BA99 BA100 BA101 BA102 L L L L L L L L L L L L L L L L H H H H H H H H H H H H H H H H L L L L L L L L L L L L L L L L H H H H H H H H H H H H H H H H L L L L L L L L H H H H H H H H L L L L H H H H L L L L H H H H L L H H L L H H L L H H L L H H L H L H L H L H L H L H L H L H * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * 500000h~50FFFFh 510000h~51FFFFh 520000h~52FFFFh 530000h~53FFFFh 540000h~54FFFFh 550000h~55FFFFh 560000h~56FFFFh 570000h~57FFFFh 580000h~58FFFFh 590000h~59FFFFh 5A0000h~5AFFFFh 5B0000h~5BFFFFh 5C0000h~5CFFFFh 5D0000h~5DFFFFh 5E0000h~5EFFFFh 5F0000h~5FFFFFh 280000h~287FFFh 288000h~28FFFFh 290000h~297FFFh 298000h~29FFFFh 2A0000h~2A7FFFh 2A8000h~2AFFFFh 2B0000h~2B7FFFh 2B8000h~2BFFFFh 2C0000h~2C7FFFh 2C8000h~2CFFFFh 2D0000h~2D7FFFh 2D8000h~2DFFFFh 2E0000h~2E7FFFh 2E8000h~2EFFFFh 2F0000h~2F7FFFh 2F8000h~2FFFFFh L L L L L L L L L L L L L L L L H H H H H H H H H H H H H H H H L L L L L L L L L L L L L L L L L L L L L L L L L L L L L L L L L L L L L L L L H H H H H H H H L L L L H H H H L L L L H H H H L L H H L L H H L L H H L L H H L H L H L H L H L H L H L H L H * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * ADDRESS RANGE BYTE MODE 400000h~40FFFFh 410000h~41FFFFh 420000h~42FFFFh 430000h~43FFFFh 440000h~44FFFFh 450000h~45FFFFh 460000h~46FFFFh 470000h~47FFFFh 480000h~48FFFFh 490000h~49FFFFh 4A0000h~4AFFFFh 4B0000h~4BFFFFh 4C0000h~4CFFFFh 4D0000h~4DFFFFh 4E0000h~4EFFFFh 4F0000h~4FFFFFh WORD MODE 200000h~207FFFh 208000h~20FFFFh 210000h~217FFFh 218000h~21FFFFh 220000h~227FFFh 228000h~22FFFFh 230000h~237FFFh 238000h~23FFFFh 240000h~247FFFh 248000h~24FFFFh 250000h~257FFFh 258000h~25FFFFh 260000h~267FFFh 268000h~26FFFFh 270000h~277FFFh 278000h~27FFFFh 2002-10-24 59/68 TC58FVM7(T/B)2AFT(65/80) BLOCK ADDRESS BANK # BLOCK # BANK ADDRESS A22 A21 A20 A19 A18 A17 A16 A15 A14 A13 A12 BA103 BA104 BA105 BA106 BA107 BA108 BA109 BA110 BA111 BA112 BA113 BA114 BA115 BA116 BA117 BA118 BK1 BA119 BA120 BA121 BA122 BA123 BA124 BA125 BA126 BA127 BA128 BA129 BA130 BA131 BA132 BA133 BA134 L L L L L L L L L L L L L L L L H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H L L L L L L L L H H H H H H H H L L L L H H H H L L L L H H H H L L H H L L H H L L H H L L H H L H L H L H L H L H L H L H L H * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * 700000h~70FFFFh 710000h~71FFFFh 720000h~72FFFFh 730000h~73FFFFh 740000h~74FFFFh 770000h~75FFFFh 760000h~76FFFFh 770000h~77FFFFh 780000h~78FFFFh 790000h~79FFFFh 7A0000h~7AFFFFh 7B0000h~7BFFFFh 7C0000h~7CFFFFh 7D0000h~7DFFFFh 7E0000h~7EFFFFh 7F0000h~7FFFFFh 380000h~387FFFh 388000h~38FFFFh 390000h~397FFFh 398000h~39FFFFh 3A0000h~3A7FFFh 3A8000h~3AFFFFh 3B0000h~3B7FFFh 3B8000h~3BFFFFh 3C0000h~3C7FFFh 3C8000h~3CFFFFh 3D0000h~3D7FFFh 3D8000h~3DFFFFh 3E0000h~3E7FFFh 3E8000h~3EFFFFh 3F0000h~3F7FFFh 3F8000h~3FFFFFh L L L L L L L L L L L L L L L L H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H L L L L L L L L L L L L L L L L L L L L L L L L H H H H H H H H L L L L H H H H L L L L H H H H L L H H L L H H L L H H L L H H L H L H L H L H L H L H L H L H * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * ADDRESS RANGE BYTE MODE 600000h~60FFFFh 610000h~61FFFFh 620000h~62FFFFh 630000h~63FFFFh 640000h~64FFFFh 650000h~65FFFFh 660000h~66FFFFh 670000h~67FFFFh 680000h~68FFFFh 690000h~69FFFFh 6A0000h~6AFFFFh 6B0000h~6BFFFFh 6C0000h~6CFFFFh 6D0000h~6DFFFFh 6E0000h~6EFFFFh 6F0000h~6FFFFFh WORD MODE 300000h~307FFFh 308000h~30FFFFh 310000h~317FFFh 318000h~31FFFFh 320000h~327FFFh 328000h~32FFFFh 330000h~337FFFh 338000h~33FFFFh 340000h~347FFFh 348000h~34FFFFh 350000h~357FFFh 358000h~35FFFFh 360000h~367FFFh 368000h~36FFFFh 370000h~377FFFh 378000h~37FFFFh 2002-10-24 60/68 TC58FVM7(T/B)2AFT(65/80) BLOCK ADDRESS BANK # BLOCK # BANK ADDRESS A22 A21 A20 A19 A18 A17 A16 A15 A14 A13 A12 BA135 BA136 BA137 BA138 BA139 BA140 BA141 BA142 BA143 BA144 BA145 BA146 BA147 BA148 BA149 BA150 BK2 BA151 BA152 BA153 BA154 BA155 BA156 BA157 BA158 BA159 BA160 BA161 BA162 BA163 BA164 BA165 BA166 H H H H H H H H H H H H H H H H L L L L L L L L L L L L L L L L L L L L L L L L L L L L L L L L H H H H H H H H H H H H H H H H L L L L L L L L H H H H H H H H L L L L H H H H L L L L H H H H L L H H L L H H L L H H L L H H L H L H L H L H L H L H L H L H * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * 900000h~90FFFFh 910000h~91FFFFh 920000h~92FFFFh 930000h~93FFFFh 940000h~94FFFFh 950000h~95FFFFh 960000h~96FFFFh 970000h~97FFFFh 980000h~98FFFFh 990000h~99FFFFh 9A0000h~9AFFFFh 9B0000h~9BFFFFh 9C0000h~9CFFFFh 9D0000h~9DFFFFh 9E0000h~9EFFFFh 9F0000h~9FFFFFh 480000h~487FFFh 488000h~48FFFFh 490000h~497FFFh 498000h~49FFFFh 4A0000h~4A7FFFh 4A8000h~4AFFFFh 4B0000h~4B7FFFh 4B8000h~4BFFFFh 4C0000h~4C7FFFh 4C8000h~4CFFFFh 4D0000h~4D7FFFh 4D8000h~4DFFFFh 4E0000h~4E7FFFh 4E8000h~4EFFFFh 4F0000h~4F7FFFh 4F8000h~4FFFFFh H H H H H H H H H H H H H H H H L L L L L L L L L L L L L L L L L L L L L L L L L L L L L L L L L L L L L L L L L L L L L L L L L L L L L L L L H H H H H H H H L L L L H H H H L L L L H H H H L L H H L L H H L L H H L L H H L H L H L H L H L H L H L H L H * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * ADDRESS RANGE BYTE MODE 800000h~80FFFFh 810000h~81FFFFh 820000h~82FFFFh 830000h~83FFFFh 840000h~84FFFFh 850000h~85FFFFh 860000h~86FFFFh 870000h~87FFFFh 880000h~88FFFFh 890000h~89FFFFh 8A0000h~8AFFFFh 8B0000h~8BFFFFh 8C0000h~8CFFFFh 8D0000h~8DFFFFh 8E0000h~8EFFFFh 8F0000h~8FFFFFh WORD MODE 400000h~407FFFh 408000h~40FFFFh 410000h~417FFFh 418000h~41FFFFh 420000h~427FFFh 428000h~42FFFFh 430000h~437FFFh 438000h~43FFFFh 440000h~447FFFh 448000h~44FFFFh 450000h~457FFFh 458000h~45FFFFh 460000h~467FFFh 468000h~46FFFFh 470000h~477FFFh 478000h~47FFFFh 2002-10-24 61/68 TC58FVM7(T/B)2AFT(65/80) BLOCK ADDRESS BANK # BLOCK # BANK ADDRESS A22 A21 A20 A19 A18 A17 A16 A15 A14 A13 A12 BA167 BA168 BA169 BA170 BA171 BA172 BA173 BA174 BA175 BA176 BA177 BA178 BA179 BA180 BA181 BA182 BK2 BA183 BA184 BA185 BA186 BA187 BA188 BA189 BA190 BA191 BA192 BA193 BA194 BA195 BA196 BA197 BA198 H H H H H H H H H H H H H H H H L L L L L L L L L L L L L L L L H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H L L L L L L L L H H H H H H H H L L L L H H H H L L L L H H H H L L H H L L H H L L H H L L H H L H L H L H L H L H L H L H L H * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * A00000h~A0FFFFh A10000h~A1FFFFh A20000h~A2FFFFh A30000h~A3FFFFh A40000h~A4FFFFh A50000h~A5FFFFh A60000h~A6FFFFh A70000h~A7FFFFh A80000h~A8FFFFh A90000h~A9FFFFh 580000h~587FFFh 588000h~58FFFFh 590000h~597FFFh 598000h~59FFFFh 5A0000h~5A7FFFh 5A8000h~5AFFFFh 5B0000h~5B7FFFh 5B8000h~5BFFFFh 5C0000h~5C7FFFh 5C8000h~5CFFFFh H H H H H H H H H H H H H H H H L L L L L L L L L L L L L L L L H H H H H H H H H H H H H H H H L L L L L L L L L L L L L L L L L L L L L L L L H H H H H H H H L L L L H H H H L L L L H H H H L L H H L L H H L L H H L L H H L H L H L H L H L H L H L H L H * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * ADDRESS RANGE BYTE MODE A00000h~A0FFFFh A10000h~A1FFFFh A20000h~A2FFFFh A30000h~A3FFFFh A40000h~A4FFFFh A50000h~A5FFFFh A60000h~A6FFFFh A70000h~A7FFFFh A80000h~A8FFFFh A90000h~A9FFFFh AA0000h~AAFFFFh AB0000h~ABFFFFh AC0000h~ACFFFFh AD0000h~ADFFFFh AE0000h~AEFFFFh AF0000h~AFFFFFh WORD MODE 500000h~507FFFh 508000h~50FFFFh 510000h~517FFFh 518000h~51FFFFh 520000h~527FFFh 528000h~52FFFFh 530000h~537FFFh 538000h~53FFFFh 540000h~547FFFh 548000h~54FFFFh 550000h~557FFFh 558000h~55FFFFh 560000h~567FFFh 568000h~56FFFFh 570000h~577FFFh 578000h~57FFFFh AA0000h~AAFFFFh 5D0000h~5D7FFFh AB0000h~ABFFFFh 5D8000h~5DFFFFh AC0000h~ACFFFFh 5E0000h~5E7FFFh AD0000h~ADFFFFh 5E8000h~5EFFFFh AE0000h~AEFFFFh AF0000h~AFFFFFh 5F0000h~5F7FFFh 5F8000h~5FFFFFh 2002-10-24 62/68 TC58FVM7(T/B)2AFT(65/80) BLOCK ADDRESS BANK # BLOCK # BANK ADDRESS A22 A21 A20 A19 A18 A17 A16 A15 A14 A13 A12 BA199 BA200 BA201 BA202 BA203 BA204 BA205 BA206 BA207 BA208 BA209 BA210 BA211 BA212 BA213 BA214 BK2 BA215 BA216 BA217 BA218 BA219 BA220 BA221 BA222 BA223 BA224 BA225 BA226 BA227 BA228 BA229 BA230 H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H L L L L L L L L L L L L L L L L H H H H H H H H H H H H H H H H L L L L L L L L H H H H H H H H L L L L H H H H L L L L H H H H L L H H L L H H L L H H L L H H L H L H L H L H L H L H L H L H * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * C00000h~C0FFFFh C10000h~C1FFFFh C20000h~C2FFFFh C30000h~C3FFFFh C40000h~C4FFFFh C50000h~C5FFFFh C60000h~C6FFFFh C70000h~C7FFFFh C80000h~C8FFFFh 680000h~687FFFh 688000h~68FFFFh 690000h~697FFFh 698000h~69FFFFh 6A0000h~6A7FFFh 6A8000h~6AFFFFh 6B0000h~6B7FFFh 6B8000h~6BFFFFh 6C0000h~6C7FFFh H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H L L L L L L L L L L L L L L L L L L L L L L L L L L L L L L L L L L L L L L L L H H H H H H H H L L L L H H H H L L L L H H H H L L H H L L H H L L H H L L H H L H L H L H L H L H L H L H L H * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * ADDRESS RANGE BYTE MODE B00000h~B0FFFFh B10000h~B1FFFFh B20000h~B2FFFFh B30000h~B3FFFFh B40000h~B4FFFFh B50000h~B5FFFFh B60000h~B6FFFFh B70000h~B7FFFFh B80000h~B8FFFFh B90000h~B9FFFFh BA0000h~BAFFFFh BB0000h~BBFFFFh BC0000h~BCFFFFh BD0000h~BDFFFFh BE0000h~BEFFFFh BF0000h~BFFFFFh WORD MODE 600000h~607FFFh 608000h~60FFFFh 610000h~617FFFh 618000h~61FFFFh 620000h~627FFFh 628000h~62FFFFh 630000h~637FFFh 638000h~63FFFFh 640000h~647FFFh 648000h~64FFFFh 650000h~657FFFh 658000h~65FFFFh 660000h~667FFFh 668000h~66FFFFh 670000h~677FFFh 678000h~67FFFFh C90000h~C9FFFFh 6C8000h~6CFFFFh CA0000h~CAFFFFh 6D0000h~6D7FFFh CB0000h~CBFFFFh 6D8000h~6DFFFFh CC0000h~CCFFFFh 6E0000h~6E7FFFh CD0000h~CDFFFFh 6E8000h~6EFFFFh CE0000h~CEFFFFh CF0000h~CFFFFFh 6F0000h~6F7FFFh 6F8000h~6FFFFFh 2002-10-24 63/68 TC58FVM7(T/B)2AFT(65/80) BLOCK ADDRESS BANK # BLOCK # BANK ADDRESS A22 A21 A20 A19 A18 A17 A16 A15 A14 A13 A12 BA231 BA232 BA233 BA234 BA235 BA236 BA237 BA238 BA239 BA240 BA241 BA242 BA243 BA244 BA245 BA246 BK3 BA247 BA248 BA249 BA250 BA251 BA252 BA253 BA254 BA255 BA256 BA257 BA258 BA259 BA260 BA261 BA262 H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H L L L L L L L L H H H H H H H H L L L L H H H H L L L L H H H H L L H H L L H H L L H H L L H H L H L H L H L H L H L H L H L H * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * E00000h~E0FFFFh E10000h~E1FFFFh E20000h~E2FFFFh E30000h~E3FFFFh E40000h~E4FFFFh E70000h~E5FFFFh E60000h~E6FFFFh E70000h~E7FFFFh E80000h~E8FFFFh E90000h~E9FFFFh 780000h~787FFFh 788000h~78FFFFh 790000h~797FFFh 798000h~79FFFFh 7A0000h~7A7FFFh 7A8000h~7AFFFFh 7B0000h~7B7FFFh 7B8000h~7BFFFFh 7C0000h~7C7FFFh 7C8000h~7CFFFFh H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H L L L L L L L L L L L L L L L L L L L L L L L L H H H H H H H H L L L L H H H H L L L L H H H H L L H H L L H H L L H H L L H H L H L H L H L H L H L H L H L H * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * ADDRESS RANGE BYTE MODE D00000h~D0FFFFh D10000h~D1FFFFh D20000h~D2FFFFh D30000h~D3FFFFh D40000h~D4FFFFh D50000h~D5FFFFh D60000h~D6FFFFh D70000h~D7FFFFh D80000h~D8FFFFh D90000h~D9FFFFh DA0000h~DAFFFFh DB0000h~DBFFFFh DC0000h~DCFFFFh WORD MODE 700000h~707FFFh 708000h~70FFFFh 710000h~717FFFh 718000h~71FFFFh 720000h~727FFFh 728000h~72FFFFh 730000h~737FFFh 738000h~73FFFFh 740000h~747FFFh 748000h~74FFFFh 750000h~757FFFh 758000h~75FFFFh 760000h~767FFFh DD0000h~DDFFFFh 768000h~76FFFFh DE0000h~DEFFFFh DF0000h~DFFFFFh 770000h~777FFFh 778000h~77FFFFh EA0000h~EAFFFFh 7D0000h~7D7FFFh EB0000h~EBFFFFh 7D8000h~7DFFFFh EC0000h~ECFFFFh 7E0000h~7E7FFFh ED0000h~EDFFFFh 7E8000h~7EFFFFh EE0000h~EEFFFFh EF0000h~EFFFFFh 7F0000h~7F7FFFh 7F8000h~7FFFFFh 2002-10-24 64/68 TC58FVM7(T/B)2AFT(65/80) BLOCK SIZE TABLE (3) TC58FVM7T2A (top boot block) BLOCK # BA0~BA31 BA32~BA127 BA128~BA223 BA224~BA254 BA255~BA262 BLOCK SIZE BYTE MODE 64 Kbytes 64 Kbytes 64 Kbytes 64 Kbytes 8 Kbytes WORD MODE 32 Kwords 32 Kwords 32 Kwords 32 Kwords 4 Kwords BANK # BK0 BK1 BK2 BK3 BK3 BANK SIZE BYTE MODE 2048 Kbytes 6144 Kbytes 6144 Kbytes 1984 Kbytes 64 Kbytes WORD MODE 1024 Kwords 3072 Kwords 3072 Kwords 992 Kwords 32 Kwords BLOCK COUNT 32 96 96 31 8 (4) TC58FVM7B2A (bottom boot block) BLOCK # BA0~BA7 BA8~BA38 BA39~BA134 BA135~BA230 BA231~BA262 BLOCK SIZE BYTE MODE 8 Kbytes 64 Kbytes 64 Kbytes 64 Kbytes 64 Kbytes WORD MODE 4 Kwords 32 Kwords 32 Kwords 32 Kwords 32 Kwords BANK # BK0 BK0 BK1 BK2 BK3 BANK SIZE BYTE MODE 64 Kbytes 1984 Kbytes 6144 Kbytes 6144 Kbytes 2048 Kbytes WORD MODE 32 Kwords 992 Kwords 3072 Kwords 3072 Kwords 1024 Kwords BLOCK COUNT 8 31 96 96 32 2002-10-24 65/68 TC58FVM7(T/B)2AFT(65/80) PACKAGE DIMENSION Unit : mm TSOPI56-P-1420-0.50A 1 0.22 0.08 56 0.08 M 14.0 0.1 14.4max 28 18.4 0.1 20.0 0.2 29 0.25 typ 0.5 1.0 0.1 1.2max 0.1 0.05 .145 0.055 0.5 0.1 0~10 2002-10-24 66/68 0.1 TC58FVM7(T/B)2AFT(65/80) Revision History Date 2002-3-14 2002-5-14 2002-5-29 Version 1.00 1.01 1.02 Original version Top Boot Address (refine). (54page) Added speed version. Changed tSUSP spec. (23page) Added a timing diagram of read after CFI/HROM command input. (26page) Erase Hold Time. (23page) Pin Capacitance. (19page) Annotated VID/VACC. (19page) Added spec of IDDO8 (1page, 20 page) Changed comment of IDDO1/IDDO7 (1page, 20page) Added typically spec of DC (21page) Added ordering information (page2) Generalize Description 2002-6-11 1.03 2002-7-30 1.04 2002-8-30 2002-10-21 2002-10-24 1.05 1.06 1.07 2002-10-24 67/68 TC58FVM7(T/B)2AFT(65/80) RESTRICTIONS ON PRODUCT USE 000707EBA * TOSHIBA is continually working to improve the quality and reliability of its products. Nevertheless, semiconductor devices in general can malfunction or fail due to their inherent electrical sensitivity and vulnerability to physical stress. It is the responsibility of the buyer, when utilizing TOSHIBA products, to comply with the standards of safety in making a safe design for the entire system, and to avoid situations in which a malfunction or failure of such TOSHIBA products could cause loss of human life, bodily injury or damage to property. In developing your designs, please ensure that TOSHIBA products are used within specified operating ranges as set forth in the most recent TOSHIBA products specifications. Also, please keep in mind the precautions and conditions set forth in the "Handling Guide for Semiconductor Devices," or "TOSHIBA Semiconductor Reliability Handbook" etc.. * The TOSHIBA products listed in this document are intended for usage in general electronics applications (computer, personal equipment, office equipment, measuring equipment, industrial robotics, domestic appliances, etc.). These TOSHIBA products are neither intended nor warranted for usage in equipment that requires extraordinarily high quality and/or reliability or a malfunction or failure of which may cause loss of human life or bodily injury ("Unintended Usage"). Unintended Usage include atomic energy control instruments, airplane or spaceship instruments, transportation instruments, traffic signal instruments, combustion control instruments, medical instruments, all types of safety devices, etc.. Unintended Usage of TOSHIBA products listed in this document shall be made at the customer's own risk. * The products described in this document are subject to the foreign exchange and foreign trade laws. * The information contained herein is presented only as a guide for the applications of our products. No responsibility is assumed by TOSHIBA CORPORATION for any infringements of intellectual property or other rights of the third parties which may result from its use. No license is granted by implication or otherwise under any intellectual property or other rights of TOSHIBA CORPORATION or others. * The information contained herein is subject to change without notice. 2002-10-24 68/68 |
Price & Availability of TC58FVM7T2
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